palomarii.h

MIPS处理器的bootloader,龙芯就是用的修改过的PMON2

/*	$Id: palomarii.h,v 1.1.1.3 2003/03/18 22:34:34 anoncvs Exp $ */

/*
 * Copyright (c) 2000 Opsycon AB  (www.opsycon.se)
 * Copyright (c) 2000 Rtmx, Inc   (www.rtmx.com)
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed for Rtmx, Inc by
 *	Opsycon Open System Consulting AB, Sweden.
 * 4. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 */

#ifndef _PALOMARII_H_
#define _PALOMARII_H_

/*
 *  PCI Bus allocation
 */
#define PALOMAR_P_ISA_IO_SPACE  0xf8000000

/*
 *  NV-Ram is a I2C serial eeprom.
 */
#define NVRAM_SIZE		0x0400	/* How many bytes, clock cells excl. */
#define NVRAM_BASE		0x0000
#define	NVRAM_FIRST_ENV		(NVRAM_BASE + 0x0000)
#define	NVRAM_LAST_ENV		(NVRAM_BASE + 0x02ff)
#define	NVRAM_SIZE_ENV		(NVRAM_LAST_ENV - NVRAM_FIRST_ENV + 1)


/*
 *  I/O ports.
 */
#define CLOCK_ADDR              PALOMAR_P_ISA_IO_SPACE+0x70
#define CLOCK_DATA              PALOMAR_P_ISA_IO_SPACE+0x71
#define FRONT_COM_BASE_ADDR     PALOMAR_P_ISA_IO_SPACE+0x3f8
#define REAR_COM_BASE_ADDR      PALOMAR_P_ISA_IO_SPACE+0x2f8

#define	PLD_IO_BASE		0x7fc00000
/*
 *  Board PLD register
 */
#define	PALOMAR_RST_STAT	0x7fff0002
#define	PALOMAR_RST_BOOT	(1 << 5)
#define	PALOMAR_CNTL_SET	0x7fff0004
#define	PALOMAR_CNTL_CLEAR	0x7fff0005
#define	PALOMAR_LED_BITFAIL	(1 << 0)
#define	PALOMAR_LED_USER	(1 << 1)
#define	PALOMAR_BIT_EN_WD	(1 << 7)

#define	PALOMAR_WD_TIME		0x7fff0008
#define	PALOMAR_WD_STB		0x7fff000d
#define	PALOMAR_WD_CNT		0x7fff000f


#endif