pci_machdep.h

MIPS处理器的bootloader,龙芯就是用的修改过的PMON2

/*	$Id: pci_machdep.h,v 1.1.1.3 2003/03/18 22:34:35 anoncvs Exp $ */
/*	$OpenBSD: pci_machdep.h,v 1.4 1998/08/06 15:04:01 pefo Exp $	*/

/*
 * Copyright (c) 1996 Carnegie-Mellon University.
 * All rights reserved.
 *
 * Author: Chris G. Demetriou
 *
 * Permission to use, copy, modify and distribute this software and
 * its documentation is hereby granted, provided that both the copyright
 * notice and this permission notice appear in all copies of the
 * software, derivative works or modified versions, and any portions
 * thereof, and that both notices appear in supporting documentation.
 *
 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * Carnegie Mellon requests users of this software to return to
 *
 *  Software Distribution Coordinator  or  [e-mail]
 *  School of Computer Science
 *  Carnegie Mellon University
 *  Pittsburgh PA 15213-3890
 *
 * any improvements or extensions that they make and grant Carnegie the
 * rights to redistribute these changes.
 */

/*
 * Machine-specific definitions for PCI autoconfiguration.
 */
#include <include/palomarii.h>

/*
 * Types provided to machine-independent PCI code
 */
typedef struct p4e_pci_chipset *pci_chipset_tag_t;
typedef u_long pcitag_t;
typedef u_long pci_intr_handle_t;

#if 0  /* These are now direct calls */
/*
 * p4e-specific PCI structure and type definitions.
 * NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE.
 */
struct p4e_pci_chipset {
	void		*pc_conf_v;
	void		(*pc_attach_hook) __P((struct device *,
			    struct device *, struct pcibus_attach_args *));
	int		(*pc_bus_maxdevs) __P((void *, int));
	pcitag_t	(*pc_make_tag) __P((void *, int, int, int));
	void		(*pc_decompose_tag) __P((void *, pcitag_t, int *,
			    int *, int *));
	pcireg_t	(*pc_conf_read) __P((void *, pcitag_t, int));
	void		(*pc_conf_write) __P((void *, pcitag_t, int, pcireg_t));

	void		*pc_intr_v;
	int		(*pc_intr_map) __P((void *, pcitag_t, int, int,
			    pci_intr_handle_t *));
	const char	*(*pc_intr_string) __P((void *, pci_intr_handle_t));
	void		*(*pc_intr_establish) __P((void *, pci_intr_handle_t,
			    int, int (*)(void *), void *, char *));
	void		(*pc_intr_disestablish) __P((void *, void *));
	int		(*pc_ether_hw_addr) __P((u_int8_t *, u_int8_t, u_int8_t));
};


/*
 * Functions provided to machine-independent PCI code.
 */
#define	pci_attach_hook(p, s, pba)					\
    (*(pba)->pba_pc->pc_attach_hook)((p), (s), (pba))
#define	pci_bus_maxdevs(c, b)						\
    (*(c)->pc_bus_maxdevs)((c)->pc_conf_v, (b))
#define	pci_make_tag(c, b, d, f)					\
    (*(c)->pc_make_tag)((c)->pc_conf_v, (b), (d), (f))
#define	pci_decompose_tag(c, t, bp, dp, fp)				\
    (*(c)->pc_decompose_tag)((c)->pc_conf_v, (t), (bp), (dp), (fp))
#define	pci_conf_read(c, t, r)						\
    (*(c)->pc_conf_read)((c)->pc_conf_v, (t), (r))
#define	pci_conf_write(c, t, r, v)					\
    (*(c)->pc_conf_write)((c)->pc_conf_v, (t), (r), (v))
#define	pci_intr_map(c, it, ip, il, ihp)				\
    (*(c)->pc_intr_map)((c)->pc_intr_v, (it), (ip), (il), (ihp))
#define	pci_intr_string(c, ih)						\
    (*(c)->pc_intr_string)((c)->pc_intr_v, (ih))
#define	pci_intr_establish(c, ih, l, h, a, nm)				\
    (*(c)->pc_intr_establish)((c)->pc_intr_v, (ih), (l), (h), (a), (nm))
#define	pci_intr_disestablish(c, iv)					\
    (*(c)->pc_intr_disestablish)((c)->pc_intr_v, (iv))
#define	pci_ether_hw_addr(c, p, b, s)					\
    (*(c)->pc_ether_hw_addr)((p), (b), (s))
#else

void	 _pci_flush __P((void));
int	 _pci_hwinit __P((int, bus_space_tag_t, bus_space_tag_t));
void	 _pci_hwreinit __P((void));
pcitag_t _pci_make_tag __P((int, int, int));
void	 _pci_break_tag __P((pcitag_t, int *, int *, int *));
pcireg_t _pci_conf_read __P((pcitag_t, int));
void	 _pci_conf_write __P((pcitag_t, int, pcireg_t));
int	 _pci_map_port __P((pcitag_t, int, unsigned int *));
int	 _pci_map_io __P((pcitag_t, int, vm_offset_t *, vm_offset_t *));
int	 _pci_map_mem __P((pcitag_t, int, vm_offset_t *, vm_offset_t *));
void	*_pci_map_int __P((pcitag_t, int, int (*)(void *), void *));
void	 _pci_devinfo __P((pcireg_t, pcireg_t, int *, char *));
void	 _pci_businit __P((int));
void	 _pci_devinit __P((int));
vm_offset_t _pci_cpumap __P((vm_offset_t, unsigned int));
vm_offset_t _pci_dmamap __P((vm_offset_t, unsigned int));
vm_offset_t _isa_cpumap __P((vm_offset_t, unsigned int));
vm_offset_t _isa_dmamap __P((vm_offset_t, unsigned int));
pcireg_t _pci_conf_read8 __P((pcitag_t, int));
pcireg_t _pci_conf_read16 __P((pcitag_t, int));
pcireg_t _pci_conf_read32 __P((pcitag_t, int));
void _pci_conf_write8 __P((pcitag_t, int, pcireg_t));
void _pci_conf_write16 __P((pcitag_t, int, pcireg_t));
void _pci_conf_write32 __P((pcitag_t, int, pcireg_t));

void	 _pci_bdfprintf (int bus, int device, int function, const char *fmt, ...);
void	 _pci_tagprintf (pcitag_t tag, const char *fmt, ...);
int	 _pci_canscan __P((pcitag_t tag));

/* sigh... compatibility */
#define	pci_attach_hook(p, s, pba)      
#define	pci_bus_maxdevs(c, b)	        (32)
#define pci_hwinit			_pci_hwinit
#define pci_hwreinit			_pci_hwreinit
#define pci_make_tag			_pci_make_tag
#define pci_break_tag			_pci_break_tag
#define pci_conf_read(a, b, c)		_pci_conf_read(b, c)
#define pci_conf_write(a, b, c, d)	_pci_conf_write(b, c, d)
#define pci_map_port			_pci_map_port
#define pci_map_io			_pci_map_io
#define pci_map_mem			_pci_map_mem
#define pci_map_int			_pci_map_int
#define pci_devinfo			_pci_devinfo
#define pci_configure			_pci_configure
#define pci_allocate_mem		_pci_allocate_mem
#define pci_allocate_io			_pci_allocate_io
#define	vtophys(p)			_pci_dmamap((vm_offset_t)p, 1)
#define pci_decompose_tag(a, b, c, d, e)	_pci_break_tag(b, c, d, e)

#define	pci_intr_map(a, b, c, d, e)		(*e = -1, 0)
#define	pci_intr_string(a,b)			("interrupts polled")
#define	pci_intr_establish(a, b, c, d, e, f)	((void *)-1)

#define	PCI_FIRST_DEVICE	1		/* Which device to scan first */
#define	PCI_FIRST_BUS		0		/* Which bus to scan first */
#define PCI_INT_0		0
#define PCI_INT_A		11
#define PCI_INT_B		10
#define PCI_INT_C		9
#define PCI_INT_D		8
#define PCI_CACHE_LINE_SIZE	8		/* The default Cache Line size 32 bytes */
/*
 * Any physcal to virtual conversion of CPU addresses.
 */
#define VA_TO_PA(x)     (x)
#define PA_TO_VA(x)     (x)

#endif