start.s

MIPS处理器的bootloader,龙芯就是用的修改过的PMON2

	IORDER
/**/
	ori	4, 3, 0x4044
	stwbrx	4, 0, 1
	IORDER
	lis	4, 0x4000
	ori	4, 4, 0x8900
	stwbrx	4, 0, 2
	IORDER
/**/
	ori	4, 3, 0x4048
	stwbrx	4, 0, 1
	IORDER
	lis	4, 0xb931
	ori	4, 4, 0x0758
	stwbrx	4, 0, 2
	IORDER
/**/
	ori	4, 3, 0x4050
	stwbrx	4, 0, 1
	IORDER
	lis	4, 0x4000
	stwbrx	4, 0, 2
	IORDER
/**/
	ori	4, 3, 0x4054
	stwbrx	4, 0, 1
	IORDER
	lis	4, 0x0008
	ori	4, 4, 0x0300
	stwbrx	4, 0, 2
	IORDER
/**/
	ori	4, 3, 0x4058
	stwbrx	4, 0, 1
	IORDER
	lis	4, 0x030e
	ori	4, 4, 0x0d4c		/* XXX IDE enable ? */
	stwbrx	4, 0, 2
	IORDER
/**/
	ori	4, 3, 0x405c
	stwbrx	4, 0, 1
	IORDER
	lis	4, 0xfc01
	stwbrx	4, 0, 2
	IORDER
/**/
	ori	4, 3, 0x4070
	stwbrx	4, 0, 1
	IORDER
	lis	4, 0x0000
	stwbrx	4, 0, 2
	IORDER
/**/
	ori	4, 3, 0x4078
	stwbrx	4, 0, 1
	IORDER
	lis	4, 0x0000
	stwbrx	4, 0, 2
	IORDER
	
	
/* Well, what the.... */
	mfmsr	3
	INT_MASK(3, 4)		/* Disable interrupt */
	ori	3, 3, 0x3002	/* set FP, ME and RI */
	mtmsr	3

/*
 *  Now we need to enable the IBAT/DBAT (after setup) to be able to
 *  access 0xfff00000+ if processor is 740/750!
 */
	IBAT_SETUP(0, 0x00001fff, 0x0000001a)
	IBAT_SETUP(1, 0xf0001fff, 0xf000002a)
	IBAT_SETUP(2, 0x00000000, 0x00000000)
	IBAT_SETUP(3, 0x00000000, 0x00000000)
	DBAT_SETUP(0, 0x00001fff, 0x0000001a)
	DBAT_SETUP(1, 0xc0001fff, 0xc000002a)
	DBAT_SETUP(2, 0x80001fff, 0x8000002a)
	DBAT_SETUP(3, 0xf0001fff, 0xf000002a)

#if 1
	mfmsr	3			/* Enable translation */
	ori	3, 3, 0x0010
	isync
	mtmsr	3
	sync
#endif

/* Turn off bitfail LED to show that mem init is done */
	lis	3, HIADJ(K2_CNTL_REG)
	lbz	4, LO(K2_CNTL_REG)(3)
	andi.	4, 4, 0xfd
	stb	4, LO(K2_CNTL_REG)(3)

/* Check if system controller */
	lis	3, HIADJ(K2_CNTL_REG)
	lbz	4, LO(K2_CNTL_REG)(3)
	andi.	4, 4, 0x08
	cmpli	0, 0, 4, 0x0
	beq	1f
	b	2f
/**/
/* Clear ins bit since system controler */
1:
	lis	3, HIADJ(K2_HOT_SWAP)
	lbz	4, LO(K2_HOT_SWAP)(3)
	andi.	4, 4, 0xff		/* XXX Really ? */
	stb	4, LO(K2_HOT_SWAP)(3)
	IORDER
2:
	lis	3, HIADJ(K2_CNTL_REG)
	lbz	4, LO(K2_CNTL_REG)(3)
	ori	4, 4, 0x01
	stb	4, LO(K2_CNTL_REG)(3)
	IORDER

/* Turn off blue LED and disable EIM mask */
	lis	3, HIADJ(K2_HOT_SWAP)
	lbz	4, LO(K2_HOT_SWAP)(3)
	andi.	4, 4, 0x00
	stb	4, LO(K2_HOT_SWAP)(3)
	IORDER

/* Enable serial port. */
	lis	3, HI(PCI_IO_SPACE_BASE)
	ori	4, 3, 0x370
	ori	5, 3, 0x370
	ori	6, 3, 0x371

	li	7, 0x51
	stb	7, 0(4)
	IORDER
	li	7, 0x23
	stb	7, 0(4)
	IORDER
	li	7, 0x22
	stb	7, 0(5)
	IORDER
	li	7, 0x00
	stb	7, 0(6)
	IORDER
/* uart1 */
	li	7, 0x07
	stb	7, 0(5)
	IORDER
	li	7, 0x04
	stb	7, 0(6)
	IORDER
	li	7, 0x30
	stb	7, 0(5)
	IORDER
	li	7, 0x01
	stb	7, 0(6)
	IORDER
/* uart3 */
	li	7, 0x07
	stb	7, 0(5)
	IORDER
	li	7, 0x05
	stb	7, 0(6)
	IORDER
	li	7, 0x30
	stb	7, 0(5)
	IORDER
	li	7, 0x01
	stb	7, 0(6)
	IORDER

/* exit config mode */
	li	7, 0xbb
	stb	7, 0(4)
	IORDER

/* Get memory size */
	lis	3, HI(PCI_IO_SPACE_BASE)
	lbz	1, 0x808(3)
	andi.	1, 1, 0x00e0

	cmpli	0, 0, 1, 0x00e0
	beq	mem_128x1
	cmpli	0, 0, 1, 0x00c0
	beq	mem_128x2
	cmpli	0, 0, 1, 0x00a0
	beq	mem_256x1
	cmpli	0, 0, 1, 0x0080
	beq	mem_256x2
	cmpli	0, 0, 1, 0x0060
	beq	mem_512x1
	cmpli	0, 0, 1, 0x0040
	beq	mem_512x2
	cmpli	0, 0, 1, 0x0020
	beq	mem_128x2
	cmpli	0, 0, 1, 0x0000
	beq	mem_128x2

mem_512x1:
	CFG_WR(CPC710_MCER0, 0x80000080)
	lis	15, 0x2000		/* Memory size accumulator = 512MB */
	b	memcomm

mem_512x2:
	CFG_WR(CPC710_MCER0, 0x80000080)
	CFG_WR(CPC710_MCER1, 0x82000080)
	lis	15, 0x4000		/* Memory size accumulator = 1024MB */
	b	memcomm

mem_256x1:
	CFG_WR(CPC710_MCER0, 0x800000d4)
	lis	15, 0x1000		/* Memory size accumulator = 256MB */
	b	memcomm

mem_256x2:
	CFG_WR(CPC710_MCER0, 0x800000d4)
	CFG_WR(CPC710_MCER1, 0x810000d4)
	lis	15, 0x2000		/* Memory size accumulator = 512MB */
	b	memcomm

mem_128x1:
	CFG_WR(CPC710_MCER0, 0x800080c0)
	lis	15, 0x0800		/* Memory size accumulator = 128MB */
	b	memcomm

mem_128x2:
	CFG_WR(CPC710_MCER0, 0x800080c0)
	CFG_WR(CPC710_MCER1, 0x808080c0)
	lis	15, 0x1000		/* Memory size accumulator = 256MB */

memcomm:
	CFG_WR(CPC710_MCCR, 0xf2b06000)
1:
	nop				/* Wait for mem init done */
	lis	3, HI(CPC710_MCCR)	/* If someone messes with macro */
	ori	3, 3, LO(CPC710_MCCR)
	lwz	4, 0(3)
	lis	5, 0x2000
	and	4, 4, 5
	cmpl	0, 0, 5, 4
	bne	1b

/*
 *  RAM memory should now be operational, we can call C-code (some
 *  restrictions still do apply, like usage of initialised vars).
 */
	lis	4, HIADJ(main_msg)
	addi	4, 4, LO(main_msg)
	add	4, 4, 16
	bl	serial_out

/*
 *  We scrub the memory we use to get rid of any parity errors.
 */
	lis	r3, 0x20		/* First two meg */
	li	4, 0x4000		/* Start from 0x4000 to preserve */
	sub	3, 3, 4			/* message areas @ 0x3000 */
	srwi	3, 3, 2			/* size div 4 */
	mtctr	3
1:
	stw	4, 0(4)			/* Zero out what will be the stack */
	addic	4, 4, 0x4
	bdnz	1b
	b	in_rom

in_ram:
	lis	4, HIADJ(ram_msg)
	addi	4, 4, LO(ram_msg)
	add	4, 4, 16
	bl	serial_out

in_rom:
	lis	4, HI(start)
	addi	1, 4, -64		/* RAM START++ will be overwritten */
	stw	15, 8(1)		/* Save away memory size */

	add	3, 4, 16
	bl	copytoram		/* Go do PPC initialization */

	cmpwi	3, 0
	beq	__go			/* Verify after copy succeded */

/* Turn on bitfail LED to show that mem init failed */
	lis	3, HIADJ(K2_CNTL_REG)
	lbz	4, LO(K2_CNTL_REG)(3)
	ori	4, 4, 0x2
	stb	4, LO(K2_CNTL_REG)(3)

	lis	4, HIADJ(fail_msg)
	addi	4, 4, LO(fail_msg)
	b	bootinit_fail
/*
 *  All stations are GO for takeoff.
 *  Lets go to the other end of the universe!
 */
__go:
	lwz	3, 8(1)			/* Memorysize */

#if 0
	mfspr	4, HID0	
	ori	4, 4, 0x4084	/* Enable D-cache */
	isync			/* Serialize disable and branch history enab */
	mtspr	HID0, 4	
	isync
#endif

	lis	1, HIADJ(STACKBASE)
	addi	1, 1, LO(STACKBASE)
	mtsprg	0, r1
	addi	r1, r1,STACKSIZE-64
	li	0, 0x0		/* Mark end of frames on stack */
	stw	0, 0(1)
	stw	0, 4(1)

	lis	4, HIADJ(initppc)
	addi	4, 4, LO(initppc)
	mtlr	4
	blr


	.rodata
main_msg:
	.asciz	"\r\nPMON2000 PowerPC Initializing. Standby...\r\n"
ram_msg:
	.asciz	"\r\nPMON2000 PowerPC Ramloaded. Standby...\r\n"
fail_msg:
	.asciz	"PANIC! Verify after copy to ram failed!\r\n"

	.section ".text"
	.align	2
/**/
bootinit_abort:
	lis	4, HIADJ(abt_msg)
	addi	4, 4, LO(abt_msg)
bootinit_fail:
	add	4, 4, 16
	bl	serial_out
1:
	b	1b

	.section ".rodata"
abt_msg:	.asciz	"PMON/PPC ABORT! No RAM memory found!\r\n"
	.section ".text"
	.align	2
/**/

/*
 *  Simple serial output routine used to communicate messages
 *  during prom setup before 'real' driver is running.
 *  This code simply displays a string of chars on the console.
 */

serial_out:
	lis	30, HIADJ(COM1_BASE_ADDR)
	addi	30, 30, LO(COM1_BASE_ADDR)
	li	31, 1
	stb	31, 4(30)	/* DTR on */
	IORDER
	li	31, 0x80	/* Get to divisor latch */
	stb	31, 3(30)
	IORDER
	li	31, NS16550HZ/(16*CONS_BAUD)
	stb	31, 0(30)
	IORDER
	li	31, 0x0
	stb	31, 1(30)
	IORDER
	li	31, 0x3		/* 8 bits no parity */
	stb	31, 3(30)
	IORDER

	lis	31, 0x0002	/* let sio stabilize */
	mtctr	31
1:
	bdnz	1b

2:
	lbz	31, 0(4)
	cmpwi	31, 0
	beq	4f
3:
	lbz	31, 5(30)
	andi.	31, 31, 0x20
	beq	3b		/* Wait for tx buffer empty */

	lbz	31, 0(4)
	stb	31, 0(30)	/* send char */
	IORDER
	addi	4, 4, 1
	b	2b

4:
	blr			/* return */
/**/

	.globl	tgt_putchar
tgt_putchar:
	lis	9, HIADJ(COM1_BASE_ADDR)
	addi	9, 9, LO(COM1_BASE_ADDR)
1:
	lbz	0, 5(9)
	andi.	0, 0, 0x20
	beq	1b

	stb	3, 0(9)
	blr
/**/