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📄 pci_machdep.c

📁 MIPS处理器的bootloader,龙芯就是用的修改过的PMON2
💻 C
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/*	$Id: pci_machdep.c,v 1.3 2003/01/20 17:02:00 pefo Exp $ *//* * Copyright (c) 2000-2002 Opsycon AB  (www.opsycon.se) * Copyright (c) 2000 Rtmx, Inc   (www.rtmx.com) *  * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright *    notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright *    notice, this list of conditions and the following disclaimer in the *    documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software *    must display the following acknowledgement: *	This product includes software developed for Rtmx, Inc by *	Opsycon Open System Consulting AB, Sweden. * 4. The name of the author may not be used to endorse or promote products *    derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * */#include <sys/param.h>#include <sys/device.h>#include <sys/systm.h>#include <sys/malloc.h>#include <dev/pci/pcivar.h>#include <dev/pci/pcireg.h>#include <machine/bus.h>#include "target/ck3.h"#include <pmon.h>#ifndef VA_TO_PA#define VA_TO_PA(x)	(x)#endif#ifndef PA_TO_VA#define	PA_TO_VA(x)	(x)#endif/* PCI i/o regions in PCI space */#define PCI_IO_SPACE_PCI_BASE		0x00000000/* PCI mem regions in PCI space */#define PCI_LOCAL_MEM_PCI_BASE	0x80000000	/* CPU Mem accessed from PCI */static pcireg_t pci_local_mem_pci_base = PCI_LOCAL_MEM_PCI_BASE;extern int _pciverbose;extern void *pmalloc __P((size_t ));struct pci_bus *_pci_bus[16];int _max_pci_bus = 0;struct pci_intline_routing iroute = {	0, 0, 0,	{	 { 0, 0, 0, 0}, { 0, 0, 0, 0}, { 0, 0, 0, 0}, { 1, 0, 0, 0},	 { 5, 0, 0, 0}, { 6, 0, 0, 0}, { 0, 0, 0, 0}, { 0, 0, 0, 0},	 { 0, 0, 0, 0}, { 0, 0, 0, 0}, { 0, 0, 0, 0}, { 0, 0, 0, 0},	 { 0, 0, 0, 0}, { 0, 0, 0, 0}, { 0, 0, 0, 0}, { 0, 0, 0, 0},	 { 0, 0, 0, 0}, { 0, 0, 0, 0}, { 0, 0, 0, 0}, { 0, 0, 0, 0},	 { 0, 0, 0, 0}, { 0, 0, 0, 0}, { 0, 0, 0, 0}, { 0, 0, 0, 0},	 { 0, 0, 0, 0}, { 0, 0, 0, 0}, { 0, 0, 0, 0}, { 0, 0, 0, 0},	 { 0, 0, 0, 0}, { 0, 0, 0, 0}, { 0, 0, 0, 0}, { 0, 0, 0, 0},        },        NULL};/* * Called to initialise the bridge at the beginning of time */int_pci_hwinit(initialise, iot, memt)	int initialise;	bus_space_tag_t iot;	bus_space_tag_t memt;{	struct pci_device *pd;	struct pci_bus *pb;	/*	 *  PCI and local bus maps 1-1	 */	iot->bus_base = PA_TO_VA(CPU_PCI32_ISA_IO_ADRS);	iot->bus_reverse = 1;	memt->bus_base = PA_TO_VA(CPU_PCI32_ISA_MEM_ADRS);	memt->bus_reverse = 1;	/* Where PCI finds our RAM memory in the PCI map */	pci_local_mem_pci_base = PCI_LOCAL_MEM_PCI_BASE;	if (!initialise) {		return(0);	}	/*	 * Initialize PCI Head device (Northbridge).	 */	pd = pmalloc(sizeof(struct pci_device));	if(pd == NULL) {		printf("pci: can't alloc memory for northbridge\n");		return(-1);	}	pd->pa.pa_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;	pd->pa.pa_iot = iot;	pd->pa.pa_memt = memt;	pd->pa.pa_dmat = &bus_dmamap_tag;	_pci_head = pd;	pd->bridge.secbus = pmalloc(sizeof(struct pci_bus));	if(pd->bridge.secbus == NULL) {		printf("pci: can't alloc memory for new pci bus\n");		return(-1);	}	pb = pd->bridge.secbus;	pb->max_lat = 255;	pb->fast_b2b = 1;	pb->prefetch = 1;	pb->bandwidth = 4000000;	pb->ndev = 1;	_pci_bushead = pb;	_pci_bus[0] = pb;	_max_pci_bus = 1;	pb->minpcimemaddr = PCI32_ISA_MEM_ADRS;	pb->nextpcimemaddr = PCI32_ISA_MEM_ADRS + PCI32_ISA_MEM_SIZE;	pb->minpciioaddr = PCI32_ISA_IO_ADRS;	pb->nextpciioaddr = PCI32_ISA_IO_ADRS + PCI32_ISA_IO_SIZE;#if 0	pb->pci_io_base = CPC700_PCI_IO_BASE;#endif	/* Interrupt routing */	_pci_inthead = &iroute;	return(1);}/* * Called to reinitialise the bridge after we've scanned each PCI device * and know what is possible. */void_pci_hwreinit (void){	int level;	/* SBS really twisted the interrupt lines. Be careful! */	_pci_conf_write(_pci_make_tag(0, 8, 0), 0x48, 0xb9310758);	level = (1L << 1) | (1L << 5) | (1L << 6);	level |= (1L << 9) | (1L << 10) | (1L << 11) | (1L << 12);	outb(PCI_IO_SPACE_BASE + 0x04d0, level);	outb(PCI_IO_SPACE_BASE + 0x04d1, level >> 8); }void_pci_flush (void){}/* *  Map the CPU virtual address of an area of local memory to a PCI *  address that can be used by a PCI bus master to access it. */vm_offset_t_pci_dmamap(va, len)	vm_offset_t va;	unsigned int len;{	return(pci_local_mem_pci_base + VA_TO_PA (va));}/* *  Map the PCI address of an area of local memory to a CPU physical *  address. */vm_offset_t_pci_cpumap(pcia, len)	vm_offset_t pcia;	unsigned int len;{	return(pcia - pci_local_mem_pci_base);}int_pci_canscan (pcitag_t tag){	pcitag_t dev = pci_make_tag(0, 0, 0);	/* Skip the CPC710 device */	if(dev == tag)		return(0);	else		return (1);}void *_pci_map_int(tag, level, func, arg)	pcitag_t tag;	int level;	int (*func) __P((void *));	void *arg;{	pcireg_t data;	int pin, bus, device;	data = _pci_conf_read(tag, PCI_INTERRUPT_REG);	pin = PCI_INTERRUPT_PIN(data);	if (pin == 0) {		/* No IRQ used. */		return NULL;	}	if (pin > 4) {		if (_pciverbose >= 1) {			_pci_tagprintf (tag, "_pci_map_int: bad interrupt pin %d\r\n", pin);		}		return(NULL);	}	_pci_break_tag (tag, &bus, &device, NULL);	if (bus != 0 || device > 5) {		return(NULL);	}	/* XXX need to work this out based on device number etc. */	_pci_tagprintf(tag, "_pci_map_int: attempt to map device %d pin %c\n", 		   device, '@' + pin);	return(NULL);}

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