vg4.h

MIPS处理器的bootloader,龙芯就是用的修改过的PMON2

/*	$Id: vg4.h,v 1.2 2002/08/12 12:30:09 pefo Exp $ */

/*
 * Copyright (c) 2000 Opsycon AB  (www.opsycon.se)
 * Copyright (c) 2000 Rtmx, Inc   (www.rtmx.com)
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed for Rtmx, Inc by
 *	Opsycon Open System Consulting AB, Sweden.
 * 4. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 */

#ifndef _VG4_H_
#define _VG4_H_

/*
 *  PCI Bus allocation
 */

#define	PCI_MEM_SPACE_BASE	MPC107_PCI_MEM_BASE
#define	PCI_IO_SPACE_BASE	MPC107_PCI_IO_BASE
#define	PCI_ISA_SPACE_IO_BASE	MPC107_PCI_IO_BASE

/*
 *  NV-Ram.
 */
#define NVRAM_SIZE		0x8000	/* How many bytes */
#define NVRAM_BASE		(PCI_MEM_SPACE_BASE + 0xf0000)
#define	NVRAM_FIRST_ENV		(NVRAM_BASE + 0x7000)
#define	NVRAM_LAST_ENV		(NVRAM_BASE + 0x7dff)
#define	NVRAM_SIZE_ENV		(NVRAM_LAST_ENV - NVRAM_FIRST_ENV + 1)
#define	NVRAM_VXWORKS		(NVRAM_BASE + 0x7f00)
#define	NVRAM_VXWORKS_DEFAULT \
"dc(0,0)host:/usr/vw/config/powervg4/vxWorks h=90.0.0.3 e=90.0.0.50 u=target"


/*
 *  I/O ports.
 */
#define COM1_BASE_ADDR		(PCI_IO_SPACE_BASE + 0x3f8)	/* Com 1 */
#define COM2_BASE_ADDR		(PCI_IO_SPACE_BASE + 0x2f8)	/* Com 2 */
#define	NS16550HZ		1843200

#define	CLOCK_ADDR		(PCI_IO_SPACE_BASE + 0x070)
#define	CLOCK_DATA		(PCI_IO_SPACE_BASE + 0x071)

#define	VG4_WCR			(PCI_IO_SPACE_BASE + 0x160)
#define	VG4_WCR_DIS		0x00
#define	VG4_WCR_ENAB		0x01
#define	VG4_WCR_SET		0x02
#define	VG4_WCR_RES		0x04
#define	VG4_NMITCR		(PCI_IO_SPACE_BASE + 0x161)
#define	VG4_LEDCR		(PCI_IO_SPACE_BASE + 0x168)
#define	VG4_LEDCR_FAIL		0x01
#define	VG4_LOCKR		(PCI_IO_SPACE_BASE + 0x169)
#define	VG4_LOCKR_UNLOCK	0x05
#define	VG4_LOCKR_LOCK		0x04

#endif