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📄 e468.lst

📁 FM发射器的源代码,义隆MCU+三洋发射IC,LV2280方案.可实现睡眠,省电,发射频率88MHZ~108MHZ.
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   179       0040 C                 mR76    ==    0x40    ; I/O data of P7.6
   180       0020 C                 mR75    ==    0x20    ; I/O data of P7.5
   181       0010 C                 mR74    ==    0x10    ; I/O data of P7.4
   182       0008 C                 mR73    ==    0x08    ; I/O data of P7.3
   183       0004 C                 mR72    ==    0x04    ; I/O data of P7.2
   184       0002 C                 mR71    ==    0x02    ; I/O data of P7.1
   185       0001 C                 mR70    ==    0x01    ; I/O data of P7.0
   186            C             ;}
   187            C        ;  
   188            C        ; Port 8 data Register
   189            C        ; 
   190       0008 C         R8       ==    0X08
   191       0008 C         PORT8    ==    0X08
   192            C        ;
   193            C             ;{
   194       0007 C                 R87     ==    0x07    ; I/O data of P8.7
   195       0006 C                 R86     ==    0x06    ; I/O data of P8.6
   196       0005 C                 R85     ==    0x05    ; I/O data of P8.5
   197       0004 C                 R84     ==    0x04    ; I/O data of P8.4
   198       0003 C                 R83     ==    0x03    ; I/O data of P8.3
   199       0002 C                 R82     ==    0x02    ; I/O data of P8.2
   200       0001 C                 R81     ==    0x01    ; I/O data of P8.1
   201       0000 C                 R80     ==    0x00    ; I/O data of P8.0
   202            C                                       ;
   203       0080 C                 mR87    ==    0x80    ; I/O data of P8.7
   204       0040 C                 mR86    ==    0x40    ; I/O data of P8.6
   205       0020 C                 mR85    ==    0x20    ; I/O data of P8.5
   206       0010 C                 mR84    ==    0x10    ; I/O data of P8.4
   207       0008 C                 mR83    ==    0x08    ; I/O data of P8.3
   208       0004 C                 mR82    ==    0x04    ; I/O data of P8.2
   209       0002 C                 mR81    ==    0x02    ; I/O data of P8.1
   210       0001 C                 mR80    ==    0x01    ; I/O data of P8.0
   211            C             ;}
   212            C        ;  
   213            C        ; LCD Control Register
   214            C        ;
   215       0009 C         R9       ==    0X09
   216       0009 C         LCDCR    ==    0X09
   217            C        ;
   218            C             ;{
   219       0007 C                 LBS         ==    0x07    ; LCD Bias Select Bit."0":1/2 Bias,"1":1/3 Bias
   220       0006 C                 DS1         ==    0x06    ; LCD Duty Select Bit[1]
   221       0005 C                 DS0         ==    0x05    ; LCD Duty Select Bit[0]
   222            C                                           ;
   223            C                                           ; |-----|-----|----------|
   224            C                                           ; | DS1 | DS0 | LCD Duty |
   225            C                                           ; |-----|-----|----------|
   226            C                                           ; |  0  |  0  | 1/2 Duty | 	
   227            C                                           ; |  0  |  1  | 1/3 Duty |	
   228            C                                           ; |  1  |  X  | 1/4 Duty |
   229            C                                           ; |-----|-----|----------|
   230            C                                           ; bit 5 not use                              
   231       0004 C                 LCDEN       ==    0x04    ; LCD Enable Bit."0":Disable,"1":Enable
   232       0002 C                 LCDTYPE     ==    0x02    ; LCD Drive Waveform Select Bit
   233            C                                           ; "0" : A Type Waveform,
   234            C                                           ; "1" : B Type Waveform
   235       0001 C                 LCDF1       ==    0x01    ; LCD Frame Frequency Control Bit[1]
   236       0000 C                 LCDF0       ==    0x00    ; LCD Frame Frequency Control Bit[0]
   237            C                                           ;
   238            C                                           ; |-----|-----|------------------------|----|
   239            C                                           ; |     |     |   LCD Frame Frequency  |    |
   240            C                                           ; |LCDF1|LCDF0|------------------------|Unit|
   241            C                                           ; |     |     |1/2 Duty|1/3Duty|1/4Duty|    |
   242            C                                           ; |-----|-----|--------|-------|-------|----|
   243            C                                           ; |  0  |  0  |  64.0  |  63.5 |  64.0 | Hz |
   244            C                                           ; |  0  |  1  |  58.5  |  58.0 |  58.5 | Hz |
   245            C                                           ; |  1  |  0  |  53.9  |  53.5 |  53.9 | Hz |
   246            C                                           ; |  1  |  1  |  70.6  |  70.0 |  70.6 | Hz |
   247            C                                           ; |-----|-----|--------|-------|-------|----|
   248            C                                           ;                                  
   249       0080 C                 mLBS        ==    0x80    ; LCD Bias Select Bit 
   250       0040 C                 mDS1        ==    0x40    ; LCD Duty Select Bit[1]
   251       0020 C                 mDS0        ==    0x20    ; LCD Duty Select Bit[0]
   252       0010 C                 mLCDEN      ==    0x10    ; LCD Enable Bit
   253            C                                           ; bit 5 not use
   254       0004 C                 mLCDTYPE    ==    0x04    ; LCD Drive Waveform Select Bit
   255       0002 C                 mLCDF1      ==    0x02    ; LCD Frame Frequency Control Bit[1]
   256       0001 C                 mLCDF0      ==    0x01    ; LCD Frame Frequency Control Bit[0]
   257            C             ;}
   258            C        ; 
   259            C        ; LCD RAM Address
   260            C        ;
   261       000A C         RA          ==    0X0A
   262       000A C         LCD_ADDR    ==    0X0A
   263            C        ;
   264            C        ; LCD Data Buffer
   265            C        ;
   266       000B C         RB        ==    0X0B
   267       000B C         LCD_DB    ==    0X0B
   268            C        ;
   269            C        ; Counter/Timer Enable Register 
   270            C        ;
   271       000C C         RC       ==    0X0C
   272       000C C         CNTER    ==    0X0C
   273            C        ;
   274            C             ;{
   275            C                                          ; bit 7~4 not use
   276       0003 C                 LPWTEN     ==    0x03    ; LPWT Enable Bit
   277            C                                          ; "0" : Disable
   278            C                                          ; "1" : Enable
   279       0002 C                 HPWTEN     ==    0x02    ; HPWT Enable Bit
   280            C                                          ; "0" : Disable
   281            C                                          ; "1" : Enable
   282       0001 C                 CNT2EN     ==    0x01    ; Counter 2 Enable Bit
   283            C                                          ; "0" : Disable
   284            C                                          ; "1" : Enable
   285       0000 C                 CNT1EN     ==    0x00    ; Counter 1 Enable Bit
   286            C                                          ; "0" : Disable
   287            C                                          ; "1" : Enable
   288            C                                          ;
   289            C                                          ; bit 7~4 not use
   290       0008 C                 mLPWTEN    ==    0x08    ; LPWT Enable Bit
   291       0004 C                 mHPWTEN    ==    0x04    ; HPWT Enable Bit
   292       0002 C                 mCNT2EN    ==    0x02    ; Counter 2 Enable Bit
   293       0001 C                 mCNT1EN    ==    0x01    ; Counter 1 Enable Bit             
   294            C              ;}
   295            C        ; 
   296            C        ; System Clock, Booster Frequency and PLL Frequency Control Register
   297            C        ;
   298       000D C         RD       ==    0X0D
   299       000D C         SBPCR    ==    0X0D
   300            C        ;
   301            C             ;{                        
   302            C                                        ; bit 7 not use
   303       0006 C                 CLK2     ==    0x06    ; Main Clock Select Bit[2] for PLL Mode
   304       0005 C                 CLK1     ==    0x05    ; Main Clock Select Bit[1] for PLL Mode
   305       0004 C                 CLK0     ==    0x04    ; Main Clock Select Bit[0] for PLL Mode
   306            C                                        ;                          
   307            C                                        ; |-----|-----|-----|----------|
   308            C                                        ; |CLK2 |CLK1 |CLK0 | PLL FREQ |
   309            C                                        ; |-----|-----|-----|----------|
   310            C                                        ; |  0  |  0  |  0  | 4.260 MHz|
   311            C                                        ; |  0  |  0  |  1  | 2.130 MHz|
   312            C                                        ; |  0  |  1  |  0  | 1.065 MHz|
   313            C                                        ; |  0  |  1  |  1  | 532.5 KHz|
   314            C                                        ; |  1  |  X  |  X  | 8.000 MHz|
   315            C                                        ; |-----|-----|-----|----------|
   316            C        				;                        
   317       0003 C                 IDLE     ==    0x03    ; IDLE Mode Select Bit
   318            C                                        ; "0"+SLEP -> Sleep Mode
   319            C                                        ; "1"+SLEP -> IDLE Mode
   320       0002 C                 BF1      ==    0x02    ; LCD Booster Frequency Select Bit[1]
   321       0001 C                 BF0      ==    0x01    ; LCD Booster Frequency Select Bit[0]
   322            C                                        ;
   323            C                                        ; |-----|-----|------------|
   324            C                                        ; | BF1 | BF0 |BOOSTER FREQ|
   325            C                                        ; |-----|-----|------------|
   326            C                                        ; |  0  |  0  |    FS      |
   327            C                                        ; |  0  |  1  |    FS/4    |
   328            C                                        ; |  1  |  0  |    FS/8    |
   329            C                                        ; |  1  |  1  |    FS/16   |
   330            C                                        ; |-----|-----|------------|
   331            C                                        ;
   332       0000 C                 CPUS     ==    0x00    ; CPU oscillator Source Select Bit.
   333            C                                        ; "0" : run on Sub Oscillator
   334            C                                        ; "1" : run on Main Oscillator
   335            C                                        ;
   336            C                                        ; bit 7 not use
   337       0040 C                 mCLK2    ==    0x40    ; Main Clock Select Bit[2] for PLL Mode
   338       0020 C                 mCLK1    ==    0x20    ; Main Clock Select Bit[1] for PLL Mode
   339       0010 C                 mCLK0    ==    0x10    ; Main Clock Select Bit[0] for PLL Mode
   340       0008 C                 mIDLE    ==    0x08    ; IDLE Mode Select Bit
   341       0004 C                 mBF1     ==    0x04    ; LCD Booster Frequency Select Bit[1]
   342       0002 C                 mBF0     ==    0x02    ; LCD Booster Frequency Select Bit[0]
   343       0001 C                 mCPUS    ==    0x01    ; CPU oscillator Source Select Bit.
   344            C             ;}         
   345            C        ;
   346            C        ; IR (Infrared) Control and PORT5 External Function Pins Set Register
   347            C        ;
   348       000E C         RE      ==    0X0E
   349       000E C         IRCR    ==    0X0E
   350            C        ;
   351            C             ;{ 
   352       0007 C                 IRE        ==    0x07    ; IR/PWM Enable Bit.
   353            C                                          ; "0" : Disable
   354            C                                          ; "1" : Enable
   355       0006 C                 HF         ==    0x06    ; IR/PWM Select Bit
   356            C                                          ; "0" : for PWM
   357            C                                          ; "1" : for IR
   358       0005 C                 LGP        ==    0x05    ; Long Pulse, Only Output Low Pulse.
   359            C                                          ; "0" : Normal
   360            C                                          ; "1" : Only Output LPWT (Include Carrier Freq.)
   361            C                                          ; bit 4 not use
   362       0003 C                 IROUTE     ==    0x03    ; Control Bit is used to define the function of P5.7(IROUT) Pin
   363            C                                          ; "0" : P5.7,bi-directional I/O Pin.
   364            C                                          ; "1" : IROUT Pin. The bit7 of IOC50 must be set to "0"
   365       0002 C                 TCCE       ==    0x02    ; Control Bit is used to define the function of P5.6(TCC) Pin
   366            C                                          ; "0" : P5.6,bi-directional I/O Pin.
   367            C                                          ; "1" : External input pin of TCC. The bit6 of IOC50 must be set to "1"

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