flash.c

本源码是液晶的12232b-4的控制程序 包括 读写

/*-----------------------------------------------------------------------------*/
#include ".\cypress\fx2.h"
#include ".\cypress\fx2regs.h"
#include ".\cypress\fx2sdly.h"
/*-----------------------------------------------------------------------------*/
void read_bytes(BYTE addr_h,BYTE addr_m,BYTE addr_l,const BYTE size,BYTE *const buf)
{
	BYTE i;
	BYTE bIFCONFIG,bPORTACFG,bPORTCCFG,bPORTECFG,bOEB,bOEC,bOED,bOEE,bOEA;

	bIFCONFIG=IFCONFIG;
	bPORTACFG=PORTACFG;
	bPORTCCFG=PORTCCFG;
	bPORTECFG=PORTECFG;
	bOEA=OEA;
	bOEB=OEB;
	bOEC=OEC;
	bOED=OED;
	bOEE=OEE; 

	//The follow to configure the registers needed in the task
	IFCONFIG=IFCONFIG & 0xFC;
	  // configure the pins for ports mode
	PORTCCFG=0x00;
	  // configure PC as I/O port
	PORTECFG=PORTECFG&0xB4;
	  // configure PE.0,PE.1,PE.1,PE.6 as I/O pins
	OEB=0xFF;
	  // configure PB as output port
	OEC=0xFF;
	  // configure PC as output port
	OED=OED|0x83;
	  // configure PD.0,PD.1,PD.7 as output pins
	OEE=(OEE|0x4B);
	  // configure PE.6,PE.3,PE.1,PE.0 as output pins
	AUTOPTRSETUP = 0x07;
	  // enable two Autopointers
	// configure the registers end
  
	IOE=IOE&0xBF;//1011-1111
	  // enable 74HCT374 which are used to lock the high address
	  // when 68013 access FLASH
	IOE=IOE|0x08;//disable245
/************************************************************************************/	
	IOC=0x00;
	SYNCDELAY;
	IOD1=0;
	IOD1=1;
	  // lock high address

	//the follow is the Erase cycle sequence
	IOC=0x0A;
	SYNCDELAY;
	IOD0=0;
	IOD0=1;
	IOC=0xAA;
	IOB=0xAA;
	IOE=IOE&0xFE;
	IOE=IOE|0x01;
	  // write 0xAA to 0xaaa

	IOC=0x05;
	IOD0=0;
	IOD0=1;
	IOC=0x55;
	IOB=0x55;
	IOE=IOE&0xFE;
	IOE=IOE|0x01;
	  // write 0x55 to 0x555

	IOC=0x0A;
	SYNCDELAY;
	IOD0=0;
	IOD0=1;
	IOC=0xAA;
	IOB=0xF0;
	IOE=IOE&0xFE;
	IOE=IOE|0x01;
	  // write 0xF0 to 0xaaa
	// Program cycle sequence end


	IOE=IOE|0x03;
	  // set FLASH's WE	
	OEB&=0x00;
	  // configure PB as input port
	  
	i = 0;
	while(1)
   {
	IOC=addr_h&0x3F;
	  // must ensure FLASH's CE is low
	SYNCDELAY;
	IOD1=0;
	IOD1=1;
	IOC=addr_m;
	SYNCDELAY;
	IOD0=0;
	IOD0=1;

	IOC=addr_l;
	IOE=IOE&0xFD;
	buf[i++]=IOB;
	IOE=IOE|0x02;
	
    if(i == size)break;
	addr_l++;
	if(addr_l == 0)
	{
	  addr_m++;
	  if(addr_m == 0) 
	  addr_h++;
	}
   }
	IOC=0xFF;// set FLASH's CE to let it standby
	IOD1=0;
	IOD1=1;
	  
	PORTACFG=bPORTACFG;
	PORTCCFG=bPORTCCFG;
	PORTECFG=bPORTECFG;
	OEA=bOEA;
	OEB=bOEB;
	OEC=bOEC;
	OED=bOED;
	OEE=bOEE;
	IFCONFIG=bIFCONFIG;	 
	  // give back the value of the backuped registers	
}