📄 sparc.h
字号:
/* Definitions of target machine for GNU compiler, for Sun SPARC. Copyright (C) 1987, 1988, 1989, 1992, 1994, 1995, 1996, 1997, 1998, 1999 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Contributed by Michael Tiemann (tiemann@cygnus.com). 64-bit SPARC-V9 support by Michael Tiemann, Jim Wilson, and Doug Evans, at Cygnus Support.This file is part of GCC.GCC is free software; you can redistribute it and/or modifyit under the terms of the GNU General Public License as published bythe Free Software Foundation; either version 2, or (at your option)any later version.GCC is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY; without even the implied warranty ofMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See theGNU General Public License for more details.You should have received a copy of the GNU General Public Licensealong with GCC; see the file COPYING. If not, write tothe Free Software Foundation, 59 Temple Place - Suite 330,Boston, MA 02111-1307, USA. *//* Note that some other tm.h files include this one and then override whatever definitions are necessary. *//* Target CPU builtins. FIXME: Defining sparc is for the benefit of Solaris only; otherwise just define __sparc__. Sadly the headers are such a mess there is no Solaris-specific header. */#define TARGET_CPU_CPP_BUILTINS() \ do \ { \ builtin_define_std ("sparc"); \ if (TARGET_64BIT) \ { \ builtin_assert ("cpu=sparc64"); \ builtin_assert ("machine=sparc64"); \ } \ else \ { \ builtin_assert ("cpu=sparc"); \ builtin_assert ("machine=sparc"); \ } \ } \ while (0)/* Specify this in a cover file to provide bi-architecture (32/64) support. *//* #define SPARC_BI_ARCH *//* Macro used later in this file to determine default architecture. */#define DEFAULT_ARCH32_P ((TARGET_DEFAULT & MASK_64BIT) == 0)/* TARGET_ARCH{32,64} are the main macros to decide which of the two architectures to compile for. We allow targets to choose compile time or runtime selection. */#ifdef IN_LIBGCC2#if defined(__sparcv9) || defined(__arch64__)#define TARGET_ARCH32 0#else#define TARGET_ARCH32 1#endif /* sparc64 */#else#ifdef SPARC_BI_ARCH#define TARGET_ARCH32 (! TARGET_64BIT)#else#define TARGET_ARCH32 (DEFAULT_ARCH32_P)#endif /* SPARC_BI_ARCH */#endif /* IN_LIBGCC2 */#define TARGET_ARCH64 (! TARGET_ARCH32)/* Code model selection in 64-bit environment. The machine mode used for addresses is 32-bit wide: TARGET_CM_32: 32-bit address space. It is the code model used when generating 32-bit code. The machine mode used for addresses is 64-bit wide: TARGET_CM_MEDLOW: 32-bit address space. The executable must be in the low 32 bits of memory. This avoids generating %uhi and %ulo terms. Programs can be statically or dynamically linked. TARGET_CM_MEDMID: 44-bit address space. The executable must be in the low 44 bits of memory, and the %[hml]44 terms are used. The text and data segments have a maximum size of 2GB (31-bit span). The maximum offset from any instruction to the label _GLOBAL_OFFSET_TABLE_ is 2GB (31-bit span). TARGET_CM_MEDANY: 64-bit address space. The text and data segments have a maximum size of 2GB (31-bit span) and may be located anywhere in memory. The maximum offset from any instruction to the label _GLOBAL_OFFSET_TABLE_ is 2GB (31-bit span). TARGET_CM_EMBMEDANY: 64-bit address space. The text and data segments have a maximum size of 2GB (31-bit span) and may be located anywhere in memory. The global register %g4 contains the start address of the data segment. Programs are statically linked and PIC is not supported. Different code models are not supported in 32-bit environment. */enum cmodel { CM_32, CM_MEDLOW, CM_MEDMID, CM_MEDANY, CM_EMBMEDANY};/* Value of -mcmodel specified by user. */extern const char *sparc_cmodel_string;/* One of CM_FOO. */extern enum cmodel sparc_cmodel;/* V9 code model selection. */#define TARGET_CM_MEDLOW (sparc_cmodel == CM_MEDLOW)#define TARGET_CM_MEDMID (sparc_cmodel == CM_MEDMID)#define TARGET_CM_MEDANY (sparc_cmodel == CM_MEDANY)#define TARGET_CM_EMBMEDANY (sparc_cmodel == CM_EMBMEDANY)#define SPARC_DEFAULT_CMODEL CM_32/* This is call-clobbered in the normal ABI, but is reserved in the home grown (aka upward compatible) embedded ABI. */#define EMBMEDANY_BASE_REG "%g4"/* Values of TARGET_CPU_DEFAULT, set via -D in the Makefile, and specified by the user via --with-cpu=foo. This specifies the cpu implementation, not the architecture size. *//* Note that TARGET_CPU_v9 is assumed to start the list of 64-bit capable cpu's. */#define TARGET_CPU_sparc 0#define TARGET_CPU_v7 0 /* alias for previous */#define TARGET_CPU_sparclet 1#define TARGET_CPU_sparclite 2#define TARGET_CPU_v8 3 /* generic v8 implementation */#define TARGET_CPU_supersparc 4#define TARGET_CPU_hypersparc 5#define TARGET_CPU_sparc86x 6#define TARGET_CPU_sparclite86x 6#define TARGET_CPU_v9 7 /* generic v9 implementation */#define TARGET_CPU_sparcv9 7 /* alias */#define TARGET_CPU_sparc64 7 /* alias */#define TARGET_CPU_ultrasparc 8#define TARGET_CPU_ultrasparc3 9#define TARGET_CPU_leon 10#if TARGET_CPU_DEFAULT == TARGET_CPU_v9 \ || TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc \ || TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc3#define CPP_CPU32_DEFAULT_SPEC ""#define ASM_CPU32_DEFAULT_SPEC ""#if TARGET_CPU_DEFAULT == TARGET_CPU_v9/* ??? What does Sun's CC pass? */#define CPP_CPU64_DEFAULT_SPEC "-D__sparc_v9__"/* ??? It's not clear how other assemblers will handle this, so by default use GAS. Sun's Solaris assembler recognizes -xarch=v8plus, but this case is handled in sol2.h. */#define ASM_CPU64_DEFAULT_SPEC "-Av9"#endif#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc#define CPP_CPU64_DEFAULT_SPEC "-D__sparc_v9__"#define ASM_CPU64_DEFAULT_SPEC "-Av9a"#endif#if TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc3#define CPP_CPU64_DEFAULT_SPEC "-D__sparc_v9__"#define ASM_CPU64_DEFAULT_SPEC "-Av9b"#endif#else#define CPP_CPU64_DEFAULT_SPEC ""#define ASM_CPU64_DEFAULT_SPEC ""#if TARGET_CPU_DEFAULT == TARGET_CPU_sparc \ || TARGET_CPU_DEFAULT == TARGET_CPU_v8#define CPP_CPU32_DEFAULT_SPEC ""#define ASM_CPU32_DEFAULT_SPEC ""#endif#if TARGET_CPU_DEFAULT == TARGET_CPU_sparclet#define CPP_CPU32_DEFAULT_SPEC "-D__sparclet__"#define ASM_CPU32_DEFAULT_SPEC "-Asparclet"#endif#if TARGET_CPU_DEFAULT == TARGET_CPU_sparclite#define CPP_CPU32_DEFAULT_SPEC "-D__sparclite__"#define ASM_CPU32_DEFAULT_SPEC "-Asparclite"#endif#if TARGET_CPU_DEFAULT == TARGET_CPU_supersparc#define CPP_CPU32_DEFAULT_SPEC "-D__supersparc__ -D__sparc_v8__"#define ASM_CPU32_DEFAULT_SPEC ""#endif#if TARGET_CPU_DEFAULT == TARGET_CPU_hypersparc#define CPP_CPU32_DEFAULT_SPEC "-D__hypersparc__ -D__sparc_v8__"#define ASM_CPU32_DEFAULT_SPEC ""#endif#if TARGET_CPU_DEFAULT == TARGET_CPU_sparclite86x#define CPP_CPU32_DEFAULT_SPEC "-D__sparclite86x__"#define ASM_CPU32_DEFAULT_SPEC "-Asparclite"#endif#if TARGET_CPU_DEFAULT == TARGET_CPU_leon#define CPP_CPU32_DEFAULT_SPEC "-D__leonbare__"#define ASM_CPU32_DEFAULT_SPEC ""#endif#endif#if !defined(CPP_CPU32_DEFAULT_SPEC) || !defined(CPP_CPU64_DEFAULT_SPEC) #error Unrecognized value in TARGET_CPU_DEFAULT.#endif#ifdef SPARC_BI_ARCH#define CPP_CPU_DEFAULT_SPEC \(DEFAULT_ARCH32_P ? "\%{m64:" CPP_CPU64_DEFAULT_SPEC "} \%{!m64:" CPP_CPU32_DEFAULT_SPEC "} \" : "\%{m32:" CPP_CPU32_DEFAULT_SPEC "} \%{!m32:" CPP_CPU64_DEFAULT_SPEC "} \")#define ASM_CPU_DEFAULT_SPEC \(DEFAULT_ARCH32_P ? "\%{m64:" ASM_CPU64_DEFAULT_SPEC "} \%{!m64:" ASM_CPU32_DEFAULT_SPEC "} \" : "\%{m32:" ASM_CPU32_DEFAULT_SPEC "} \%{!m32:" ASM_CPU64_DEFAULT_SPEC "} \")#else /* !SPARC_BI_ARCH */#define CPP_CPU_DEFAULT_SPEC (DEFAULT_ARCH32_P ? CPP_CPU32_DEFAULT_SPEC : CPP_CPU64_DEFAULT_SPEC)#define ASM_CPU_DEFAULT_SPEC (DEFAULT_ARCH32_P ? ASM_CPU32_DEFAULT_SPEC : ASM_CPU64_DEFAULT_SPEC)#endif /* !SPARC_BI_ARCH *//* Define macros to distinguish architectures. *//* Common CPP definitions used by CPP_SPEC amongst the various targets for handling -mcpu=xxx switches. */#define CPP_CPU_SPEC "\%{msoft-float:-D_SOFT_FLOAT} \%{mflat: -D_FLAT} \%{mcypress:} \%{msparclite:-D__sparclite__} \%{mf930:-D__sparclite__} %{mf934:-D__sparclite__} \%{mv8:-D__sparc_v8__} \%{msupersparc:-D__supersparc__ -D__sparc_v8__} \%{mcpu=sparclet:-D__sparclet__} %{mcpu=tsc701:-D__sparclet__} \%{mcpu=sparclite:-D__sparclite__} \%{mcpu=f930:-D__sparclite__} %{mcpu=f934:-D__sparclite__} \%{mcpu=v8:-D__sparc_v8__} \%{mcpu=supersparc:-D__supersparc__ -D__sparc_v8__} \%{mcpu=hypersparc:-D__hypersparc__ -D__sparc_v8__} \%{mcpu=sparclite86x:-D__sparclite86x__} \%{mcpu=v9:-D__sparc_v9__} \%{mcpu=ultrasparc:-D__sparc_v9__} \%{mcpu=ultrasparc3:-D__sparc_v9__} \%{!mcpu*:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8:%{!msupersparc:%(cpp_cpu_default)}}}}}}} \"#define CPP_ARCH32_SPEC ""#define CPP_ARCH64_SPEC "-D__arch64__"#define CPP_ARCH_DEFAULT_SPEC \(DEFAULT_ARCH32_P ? CPP_ARCH32_SPEC : CPP_ARCH64_SPEC)#define CPP_ARCH_SPEC "\%{m32:%(cpp_arch32)} \%{m64:%(cpp_arch64)} \%{!m32:%{!m64:%(cpp_arch_default)}} \"/* Macros to distinguish endianness. */#define CPP_ENDIAN_SPEC "\%{mlittle-endian:-D__LITTLE_ENDIAN__} \%{mlittle-endian-data:-D__LITTLE_ENDIAN_DATA__}"/* Macros to distinguish the particular subtarget. */#define CPP_SUBTARGET_SPEC ""#define CPP_SPEC "%(cpp_cpu) %(cpp_arch) %(cpp_endian) %(cpp_subtarget)"/* Prevent error on `-sun4' and `-target sun4' options. *//* This used to translate -dalign to -malign, but that is no good because it can't turn off the usual meaning of making debugging dumps. *//* Translate old style -m<cpu> into new style -mcpu=<cpu>. ??? Delete support for -m<cpu> for 2.9. */#define CC1_SPEC "\%{sun4:} %{target:} \%{mcypress:-mcpu=cypress} \%{msparclite:-mcpu=sparclite} %{mf930:-mcpu=f930} %{mf934:-mcpu=f934} \%{mv8:-mcpu=v8} %{msupersparc:-mcpu=supersparc} \"/* Override in target specific files. */#define ASM_CPU_SPEC "\%{mcpu=sparclet:-Asparclet} %{mcpu=tsc701:-Asparclet} \%{msparclite:-Asparclite} \%{mf930:-Asparclite} %{mf934:-Asparclite} \%{mcpu=sparclite:-Asparclite} \%{mcpu=sparclite86x:-Asparclite} \%{mcpu=f930:-Asparclite} %{mcpu=f934:-Asparclite} \%{mv8plus:-Av8plus} \%{mcpu=v9:-Av9} \%{mcpu=ultrasparc:%{!mv8plus:-Av9a}} \%{mcpu=ultrasparc3:%{!mv8plus:-Av9b}} \%{!mcpu*:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8:%{!msupersparc:%(asm_cpu_default)}}}}}}} \"/* Word size selection, among other things. This is what GAS uses. Add %(asm_arch) to ASM_SPEC to enable. */#define ASM_ARCH32_SPEC "-32"#ifdef HAVE_AS_REGISTER_PSEUDO_OP#define ASM_ARCH64_SPEC "-64 -no-undeclared-regs"#else#define ASM_ARCH64_SPEC "-64"#endif#define ASM_ARCH_DEFAULT_SPEC \(DEFAULT_ARCH32_P ? ASM_ARCH32_SPEC : ASM_ARCH64_SPEC)#define ASM_ARCH_SPEC "\%{m32:%(asm_arch32)} \%{m64:%(asm_arch64)} \%{!m32:%{!m64:%(asm_arch_default)}} \
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -