fiq.lst
来自「悬挂绘图系统（2005年全国电子设计大赛题目）基于凌阳单片机」· LST 代码 · 共 360 行 · 第 1/2 页
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<
< .DEFINE C_2048Hz 0x0000; //
< .DEFINE C_1024Hz 0x0008; //
< .DEFINE C_256Hz 0x0010; //
< .DEFINE C_TMB1Hz 0x0018; //
< .DEFINE C_4Hz 0x0020; //
< .DEFINE C_2Hz 0x0028; //
< .DEFINE C_B1 0x0030; //
< .DEFINE C_Ext2 0x0038; //
<
< .DEFINE C_Off 0x0000; //
< .DEFINE C_D1 0x0040; //
< .DEFINE C_D2 0x0080; //
< .DEFINE C_D3 0x00C0; //
< .DEFINE C_D4 0x0100; //
< .DEFINE C_D5 0x0140; //
< .DEFINE C_D6 0x0180; //
< .DEFINE C_D7 0x01C0; //
< .DEFINE C_D8 0x0200; //
< .DEFINE C_D9 0x0240; //
< .DEFINE C_D10 0x0280; //
< .DEFINE C_D11 0x02C0; //
< .DEFINE C_D12 0x0300; //
< .DEFINE C_D13 0x0340; //
< .DEFINE C_D14 0x0380; //
< .DEFINE C_TA_Div_2 0x03C0; // Timer A
< .DEFINE C_TB_Div_2 0x03C0; // Timer B
<
< //... Definition for P_SystemClock ............
< .DEFINE C_Fosc 0x0000; // b3..b0
< .DEFINE C_Fosc_Div_2 0x0001; //
< .DEFINE C_Fosc_Div_4 0x0002; //
< .DEFINE C_Fosc_Div_8 0x0003; // (default)
< .DEFINE C_Fosc_Div_16 0x0004; //
< .DEFINE C_Fosc_Div_32 0x0005; //
< .DEFINE C_Fosc_Div_64 0x0006; //
< .DEFINE C_Sleep 0x0007; //
<
< .DEFINE C_32K_Work 0x0000; // b4
< .DEFINE C_32K_Off 0x0000; //
< .DEFINE C_StrongMode 0x0000; // b5
< .DEFINE C_AutoMode 0x0000; //
<
< //... Define for P_AD_Ctrl ....................
< .DEFINE C_AD 0x0001; //
< .DEFINE C_DA 0x0000; //
< .DEFINE C_MIC 0x0000; //
< .DEFINE C_LINE 0x0002; //
<
< //... Define for P_DA_Ctrl ....................
< .DEFINE C_PushPull 0x0000; // b0, (default)
< .DEFINE C_DoubleEnd 0x0001; // b0
< .DEFINE C_DAC_Mode 0x0000; // b1, (default)
< .DEFINE C_PWM_Mode 0x0002; // b1
<
< .DEFINE C_D1_Direct 0x0000; // DAC1 latch
< .DEFINE C_D1_LatchA 0x0008; //
< .DEFINE C_D1_LatchB 0x0010; //
< .DEFINE C_D1_LatchAB 0x0018; //
<
< .DEFINE C_D2_Direct 0x0000; // DAC2 latch
< .DEFINE C_D2_LatchA 0x0020; //
< .DEFINE C_D2_LatchB 0x0040; //
< .DEFINE C_D2_LatchAB 0x00C0; //
<
< //... Define for P_LVD_Ctrl ...................
< .DEFINE C_LVD24V 0x0000; // LVD = 2.4V
< .DEFINE C_LVD28V 0x0001; // LVD = 2.8V
< .DEFINE C_LVD32V 0x0002; // LVD = 3.2V
< .DEFINE C_LVD36V 0x0003; // LVD = 3.6V
<
<
< .EXTERNAL F_SP_Read_INT_Status; // for further use
< .EXTERNAL F_SP_Write_INT_Status; // for further use
< .EXTERNAL F_SP_Set_INT_Vector; // for further use
< .EXTERNAL F_SP_Clear_INT_Vector; // for further use
<
< .EXTERNAL F_SP_Send_Out; //
< .EXTERNAL F_SP_Send_DAC1; //
< .EXTERNAL F_SP_Send_DAC2; //
< .EXTERNAL F_SP_Send_Two_DAC; //
< .EXTERNAL F_SP_Init_HW; //
<
< .EXTERNAL R_InterruptStatus;
<
<
< .EXTERNAL F_SP_RampUpDAC1;
< .EXTERNAL F_SP_RampDnDAC1;
< .EXTERNAL F_SP_RampUpDAC2;
< .EXTERNAL F_SP_RampDnDAC2;
<
< .EXTERNAL F_SP_InitQueue;
< .EXTERNAL F_SP_ReadQueue;
< .EXTERNAL F_SP_WriteQueue;
< .EXTERNAL F_SP_TestQueue;
<
<
<
< .EXTERNAL F_SP_Get_ADC
<
< .EXTERNAL F_SP_Set_P_TimerA_Ctrl
< .EXTERNAL F_SP_Set_P_TimerA_Data
< .EXTERNAL F_SP_Set_P_TimerB_Ctrl
< .EXTERNAL F_SP_Set_P_TimerB_Data
< .EXTERNAL F_SP_Set_P_INT_Ctrl
< .EXTERNAL F_SP_Set_P_INT_Clear
< .EXTERNAL F_SP_Set_P_SystemClock
< .EXTERNAL F_SP_Set_P_DAC_Ctrl
< .EXTERNAL F_SP_Set_P_ADC_Ctrl
<
<
<
< //--------------------------------------------
< SACM_MACRO1: .MACRO
<
< .ENDM
<
< SACM_MACRO2: .MACRO
<
< .ENDM
<
<
<
<
< //.define PC_Play_Enable_A2000 1 // Enable the PC-Play function for SACM-A2000 module
< //.define PC_Play_Enable_S480 1 // Enable the PC-Play function for SACM-S480 module
< //.define PC_Play_Enable_S240 1 // Enable the PC-Play function for SACM-S240 module
< //.define PC_Play_Enable_MS01 1 // Enable the PC-Play function for SACM-MS01 module
<
<
<
< //========================================================================================
< // End of hardware.inc
< //========================================================================================
00008390 .TEXT
_FIQ:
00008390 A0 D8 push R1,R4 to [SP]
00008391 11 93 10 70 R1 = [P_INT_Ctrl]
00008393 09 B3 00 20 R1 &= 0x2000
00008395 08 5E jz ?notTimerA //当不为TIQ_TMA，则转
//返回中断
?BSR_NotBusy: //放音处理
//[_PlayFlag]为1则是播放2000
?Play2000: //2000播放子程序
00008396 40 F0 FA 9D call F_FIQ_Service_SACM_A2000;
?BSR_Busy: //返回中断
00008398 09 93 00 20 R1 = 0x2000
0000839A 19 D3 11 70 [P_INT_Clear] = R1
0000839C A0 90 pop R1,R4 from [SP];
0000839D 98 9A reti;
?notTimerA:
0000839E 09 93 00 88 R1 = 0x8800;
000083A0 19 D3 11 70 [P_INT_Clear] = R1;
000083A2 A0 90 pop R1,R4 from [SP];
000083A3 98 9A reti;
L_FIQ_TimerB:
000083A4 A8 90 POP R1,R5 FROM[SP];
000083A5 98 9A RETI;
L_FIQ_PWM:
000083A6 19 D3 11 70 [P_INT_Clear] = R1;
000083A8 A8 90 POP R1,R5 FROM[SP];
000083A9 98 9A RETI;
L_FIQ_TimerA:
000083AA 19 D3 11 70 [P_INT_Clear] = R1;
000083AC A8 90 POP R1,R5 FROM[SP];
000083AD 98 9A RETI;
_BREAK:
000083AE A0 D8 PUSH R1,R4 TO [SP];
000083AF A0 90 POP R1,R4 FROM[SP];
000083B0 98 9A RETI;
.END
0 error(s), 0 warning(s).
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