📄 main.dbg
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;*****************************************************************
;* This stationery serves as the framework for a *
;* user application (single file, absolute assembly application) *
;* For a more comprehensive program that *
;* demonstrates the more advanced functionality of this *
;* processor, please see the demonstration applications *
;* located in the examples subdirectory of the *
;* Metrowerks CodeWarrior for the HC12 Program directory *
;*****************************************************************
; export symbols
XDEF MAIN ; export 'Entry' symbol
ABSENTRY MAIN ; for absolute assembly: mark this as application entry point
; include derivative specific macros
INCLUDE 'mc9s12dg128.inc'
; Based on CPU DB MC9S12DG128, version 2.87.241 (RegistersPrg V1.052)
; ###################################################################
; Filename : MC9S12DG128.h
; Processor : MC9S12DG128BCPV
; FileFormat: V1.052
; DataSheet : 9S12DT128BDGV1/D V01.05
; Compiler : Metrowerks C compiler
; Date/Time : 12.02.2004, 17:20
; Abstract :
; This implements an IO devices mapping.
;
; (c) Copyright UNIS, spol. s r.o. 1997-2003
; UNIS, spol. s r.o.
; Jundrovska 33
; 624 00 Brno
; Czech Republic
; http : www.processorexpert.com
; mail : info@processorexpert.com
; ###################################################################
;*** Memory Map and Interrupt Vectors
;******************************************
RAMStart: equ $00002000
RAMEnd: equ $00003FFF
ROM_C000Start: equ $0000C000
ROM_C000End: equ $0000FF7F
ROM_4000Start: equ $00004000
ROM_4000End: equ $00007FFF
ROM_PAGE38Start: equ $00388000
ROM_PAGE38End: equ $0038BFFF
ROM_PAGE39Start: equ $00398000
ROM_PAGE39End: equ $0039BFFF
ROM_PAGE3AStart: equ $003A8000
ROM_PAGE3AEnd: equ $003ABFFF
ROM_PAGE3BStart: equ $003B8000
ROM_PAGE3BEnd: equ $003BBFFF
ROM_PAGE3CStart: equ $003C8000
ROM_PAGE3CEnd: equ $003CBFFF
ROM_PAGE3DStart: equ $003D8000
ROM_PAGE3DEnd: equ $003DBFFF
;
VReserved63: equ $0000FF80
VReserved62: equ $0000FF82
VReserved61: equ $0000FF84
VReserved60: equ $0000FF86
VReserved59: equ $0000FF88
VReserved58: equ $0000FF8A
Vpwmesdn: equ $0000FF8C
Vportp: equ $0000FF8E
Vcan4tx: equ $0000FF90
Vcan4rx: equ $0000FF92
Vcan4err: equ $0000FF94
Vcan4wkup: equ $0000FF96
VReserved51: equ $0000FF98
VReserved50: equ $0000FF9A
VReserved49: equ $0000FF9C
VReserved48: equ $0000FF9E
VReserved47: equ $0000FFA0
VReserved46: equ $0000FFA2
VReserved45: equ $0000FFA4
VReserved44: equ $0000FFA6
VReserved43: equ $0000FFA8
VReserved42: equ $0000FFAA
VReserved41: equ $0000FFAC
VReserved40: equ $0000FFAE
Vcan0tx: equ $0000FFB0
Vcan0rx: equ $0000FFB2
Vcan0err: equ $0000FFB4
Vcan0wkup: equ $0000FFB6
Vflash: equ $0000FFB8
Veeprom: equ $0000FFBA
VReserved33: equ $0000FFBC
Vspi1: equ $0000FFBE
Viic: equ $0000FFC0
VReserved30: equ $0000FFC2
Vcrgscm: equ $0000FFC4
Vcrgplllck: equ $0000FFC6
Vtimpabovf: equ $0000FFC8
Vtimmdcu: equ $0000FFCA
Vporth: equ $0000FFCC
Vportj: equ $0000FFCE
Vatd1: equ $0000FFD0
Vatd0: equ $0000FFD2
Vsci1: equ $0000FFD4
Vsci0: equ $0000FFD6
Vspi0: equ $0000FFD8
Vtimpaie: equ $0000FFDA
Vtimpaaovf: equ $0000FFDC
Vtimovf: equ $0000FFDE
Vtimch7: equ $0000FFE0
Vtimch6: equ $0000FFE2
Vtimch5: equ $0000FFE4
Vtimch4: equ $0000FFE6
Vtimch3: equ $0000FFE8
Vtimch2: equ $0000FFEA
Vtimch1: equ $0000FFEC
Vtimch0: equ $0000FFEE
Vrti: equ $0000FFF0
Virq: equ $0000FFF2
Vxirq: equ $0000FFF4
Vswi: equ $0000FFF6
Vtrap: equ $0000FFF8
Vcop: equ $0000FFFA
Vclkmon: equ $0000FFFC
Vreset: equ $0000FFFE
;
;*** PORTAB - Port AB Register; 0x00000000 ***
PORTAB: equ $00000000 ;*** PORTAB - Port AB Register; 0x00000000 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
PORTAB_BIT0: equ 0 ; Port B Bit 0, ADDR0, DATA0
PORTAB_BIT1: equ 1 ; Port B Bit1, ADDR1, DATA1
PORTAB_BIT2: equ 2 ; Port B Bit2, ADDR2, DATA2
PORTAB_BIT3: equ 3 ; Port B Bit3, ADDR3, DATA3
PORTAB_BIT4: equ 4 ; Port B Bit4, ADDR4, DATA4
PORTAB_BIT5: equ 5 ; Port B Bit5, ADDR5, DATA5
PORTAB_BIT6: equ 6 ; Port B Bit6, ADDR6, DATA6
PORTAB_BIT7: equ 7 ; Port B Bit7, ADDR7, DATA7
PORTAB_BIT8: equ 8 ; Port A Bit0, ADDR8, DATA8, DATA0
PORTAB_BIT9: equ 9 ; Port A Bit1, ADDR9, DATA9 DATA1
PORTAB_BIT10: equ 10 ; Port A Bit2, ADDR10, DATA10, DATA2
PORTAB_BIT11: equ 11 ; Port A Bit3, ADDR11, DATA11, DATA3
PORTAB_BIT12: equ 12 ; Port A Bit4, ADDR12, DATA12, DATA4
PORTAB_BIT13: equ 13 ; Port A Bit5, ADDR13, DATA13, DATA5
PORTAB_BIT14: equ 14 ; Port A Bit6, ADDR14, DATA14, DATA6
PORTAB_BIT15: equ 15 ; Port A Bit7, ADDR15, DATA15, DATA7
; bit position masks
mPORTAB_BIT0: equ %00000001 ; Port B Bit 0, ADDR0, DATA0
mPORTAB_BIT1: equ %00000010 ; Port B Bit1, ADDR1, DATA1
mPORTAB_BIT2: equ %00000100 ; Port B Bit2, ADDR2, DATA2
mPORTAB_BIT3: equ %00001000 ; Port B Bit3, ADDR3, DATA3
mPORTAB_BIT4: equ %00010000 ; Port B Bit4, ADDR4, DATA4
mPORTAB_BIT5: equ %00100000 ; Port B Bit5, ADDR5, DATA5
mPORTAB_BIT6: equ %01000000 ; Port B Bit6, ADDR6, DATA6
mPORTAB_BIT7: equ %10000000 ; Port B Bit7, ADDR7, DATA7
mPORTAB_BIT8: equ %100000000 ; Port A Bit0, ADDR8, DATA8, DATA0
mPORTAB_BIT9: equ %1000000000 ; Port A Bit1, ADDR9, DATA9 DATA1
mPORTAB_BIT10: equ %10000000000 ; Port A Bit2, ADDR10, DATA10, DATA2
mPORTAB_BIT11: equ %100000000000 ; Port A Bit3, ADDR11, DATA11, DATA3
mPORTAB_BIT12: equ %1000000000000 ; Port A Bit4, ADDR12, DATA12, DATA4
mPORTAB_BIT13: equ %10000000000000 ; Port A Bit5, ADDR13, DATA13, DATA5
mPORTAB_BIT14: equ %100000000000000 ; Port A Bit6, ADDR14, DATA14, DATA6
mPORTAB_BIT15: equ %1000000000000000 ; Port A Bit7, ADDR15, DATA15, DATA7
;*** PORTA - Port A Register; 0x00000000 ***
PORTA: equ $00000000 ;*** PORTA - Port A Register; 0x00000000 ***
; bit numbers for user in BCLR, BSET, BRCLR and BRSET
PORTA_BIT0: equ 0 ; Port A Bit0, ADDR8, DATA8, DATA0
PORTA_BIT1: equ 1 ; Port A Bit1, ADDR9, DATA9 DATA1
PORTA_BIT2: equ 2 ; Port A Bit2, ADDR10, DATA10, DATA2
PORTA_BIT3: equ 3 ; Port A Bit3, ADDR11, DATA11, DATA3
PORTA_BIT4: equ 4 ; Port A Bit4, ADDR12, DATA12, DATA4
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