2c35_fft_acceleration.qsf

在cycloneII里实现对FFT的硬件加速

set_location_assignment LAB_X2_Y8 -to "FFT_system:inst|sdram:the_sdram|sdram_auk_ddr_sdram:sdram_auk_ddr_sdram_inst|sdram_auk_ddr_datapath:ddr_io|sdram_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io|altddio_bidir:\\g_dq_io:6:dq_io|ddio_bidir_6bg:auto_generated|oe_cell"
set_location_assignment LAB_X3_Y8 -to "FFT_system:inst|sdram:the_sdram|sdram_auk_ddr_sdram:sdram_auk_ddr_sdram_inst|sdram_auk_ddr_datapath:ddr_io|sdram_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io|resynched_data[6]"
set_location_assignment LAB_X3_Y8 -to "FFT_system:inst|sdram:the_sdram|sdram_auk_ddr_sdram:sdram_auk_ddr_sdram_inst|sdram_auk_ddr_datapath:ddr_io|sdram_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io|resynched_data[14]"
set_location_assignment PIN_V6 -to ddr_dq[15]
set_location_assignment LAB_X1_Y8 -to "FFT_system:inst|sdram:the_sdram|sdram_auk_ddr_sdram:sdram_auk_ddr_sdram_inst|sdram_auk_ddr_datapath:ddr_io|sdram_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io|altddio_bidir:\\g_dq_io:7:dq_io|ddio_bidir_6bg:auto_generated|input_cell_h[0]"
set_location_assignment LAB_X1_Y8 -to "FFT_system:inst|sdram:the_sdram|sdram_auk_ddr_sdram:sdram_auk_ddr_sdram_inst|sdram_auk_ddr_datapath:ddr_io|sdram_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io|altddio_bidir:\\g_dq_io:7:dq_io|ddio_bidir_6bg:auto_generated|input_cell_l[0]"
set_location_assignment LAB_X1_Y8 -to "FFT_system:inst|sdram:the_sdram|sdram_auk_ddr_sdram:sdram_auk_ddr_sdram_inst|sdram_auk_ddr_datapath:ddr_io|sdram_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io|altddio_bidir:\\g_dq_io:7:dq_io|ddio_bidir_6bg:auto_generated|input_latch_l[0]"
set_location_assignment LAB_X2_Y8 -to "FFT_system:inst|sdram:the_sdram|sdram_auk_ddr_sdram:sdram_auk_ddr_sdram_inst|sdram_auk_ddr_datapath:ddr_io|sdram_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io|altddio_bidir:\\g_dq_io:7:dq_io|ddio_bidir_6bg:auto_generated|output_cell_H[0]"
set_location_assignment LAB_X2_Y8 -to "FFT_system:inst|sdram:the_sdram|sdram_auk_ddr_sdram:sdram_auk_ddr_sdram_inst|sdram_auk_ddr_datapath:ddr_io|sdram_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io|altddio_bidir:\\g_dq_io:7:dq_io|ddio_bidir_6bg:auto_generated|output_cell_L[0]"
set_location_assignment LAB_X2_Y8 -to "FFT_system:inst|sdram:the_sdram|sdram_auk_ddr_sdram:sdram_auk_ddr_sdram_inst|sdram_auk_ddr_datapath:ddr_io|sdram_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io|altddio_bidir:\\g_dq_io:7:dq_io|ddio_bidir_6bg:auto_generated|oe_cell"
set_location_assignment LAB_X3_Y8 -to "FFT_system:inst|sdram:the_sdram|sdram_auk_ddr_sdram:sdram_auk_ddr_sdram_inst|sdram_auk_ddr_datapath:ddr_io|sdram_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io|resynched_data[7]"
set_location_assignment LAB_X3_Y8 -to "FFT_system:inst|sdram:the_sdram|sdram_auk_ddr_sdram:sdram_auk_ddr_sdram_inst|sdram_auk_ddr_datapath:ddr_io|sdram_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io|resynched_data[15]"
set_location_assignment PIN_W4 -to ddr_dqs[1]
set_location_assignment LAB_X2_Y9 -to "FFT_system:inst|sdram:the_sdram|sdram_auk_ddr_sdram:sdram_auk_ddr_sdram_inst|sdram_auk_ddr_datapath:ddr_io|sdram_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io|altddio_bidir:dqs_io|ddio_bidir_l9h:auto_generated|output_cell_H[0]"
set_location_assignment LAB_X2_Y9 -to "FFT_system:inst|sdram:the_sdram|sdram_auk_ddr_sdram:sdram_auk_ddr_sdram_inst|sdram_auk_ddr_datapath:ddr_io|sdram_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io|altddio_bidir:dqs_io|ddio_bidir_l9h:auto_generated|output_cell_L[0]"
set_location_assignment LAB_X2_Y9 -to "FFT_system:inst|sdram:the_sdram|sdram_auk_ddr_sdram:sdram_auk_ddr_sdram_inst|sdram_auk_ddr_datapath:ddr_io|sdram_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io|altddio_bidir:dqs_io|ddio_bidir_l9h:auto_generated|oe_cell"
set_location_assignment LAB_X4_Y9 -to "FFT_system:inst|sdram:the_sdram|sdram_auk_ddr_sdram:sdram_auk_ddr_sdram_inst|sdram_auk_ddr_datapath:ddr_io|sdram_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io|altddio_bidir:dqs_io|ddio_bidir_l9h:auto_generated|ext_oe_cell"
set_location_assignment PIN_AA1 -to ddr_dm[1]
set_location_assignment LAB_X2_Y8 -to "FFT_system:inst|sdram:the_sdram|sdram_auk_ddr_sdram:sdram_auk_ddr_sdram_inst|sdram_auk_ddr_datapath:ddr_io|sdram_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io|altddio_out:dm_pin|ddio_out_clb:auto_generated|output_cell_H[0]"
set_location_assignment LAB_X2_Y8 -to "FFT_system:inst|sdram:the_sdram|sdram_auk_ddr_sdram:sdram_auk_ddr_sdram_inst|sdram_auk_ddr_datapath:ddr_io|sdram_auk_ddr_dqs_group:\\g_datapath:1:g_ddr_io|altddio_out:dm_pin|ddio_out_clb:auto_generated|output_cell_L[0]"
set_location_assignment PIN_T6 -to ddr_a[0]
set_location_assignment PIN_V2 -to ddr_a[1]
set_location_assignment PIN_R8 -to ddr_a[2]
set_location_assignment PIN_W3 -to ddr_a[3]
set_location_assignment PIN_R5 -to ddr_a[4]
set_location_assignment PIN_U10 -to ddr_a[5]
set_location_assignment PIN_P4 -to ddr_a[6]
set_location_assignment PIN_V1 -to ddr_a[7]
set_location_assignment PIN_T9 -to ddr_a[8]
set_location_assignment PIN_T8 -to ddr_a[9]
set_location_assignment PIN_AA2 -to ddr_a[10]
set_location_assignment PIN_T10 -to ddr_a[11]
set_location_assignment PIN_U3 -to ddr_a[12]
set_location_assignment PIN_U9 -to ddr_ba[0]
set_location_assignment PIN_Y4 -to ddr_ba[1]
set_location_assignment PIN_Y3 -to ddr_cs_n[0]
set_location_assignment PIN_R7 -to ddr_cke[0]
set_location_assignment PIN_U1 -to ddr_cas_n
set_location_assignment PIN_V4 -to ddr_ras_n
set_location_assignment PIN_U4 -to ddr_we_n
set_location_assignment PIN_AA7 -to clk_to_sdram[0]
set_location_assignment PIN_AA6 -to clk_to_sdram_n[0]
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dm[0]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dm[1]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[0]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[1]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[2]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[3]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[4]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[5]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[6]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[7]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[8]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[9]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[10]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[11]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[12]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[13]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[14]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dq[15]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dqs[0]
set_instance_assignment -name OUTPUT_PIN_LOAD 4 -to ddr_dqs[1]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ras_n
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_cas_n
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_we_n
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_cke[0]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_a[0]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_a[1]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_a[2]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_a[3]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_a[4]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_a[5]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_a[6]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_a[7]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_a[8]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_a[9]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_a[10]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_a[11]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_a[12]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ba[0]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_ba[1]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to ddr_cs_n[0]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to clk_to_sdram[0]
set_instance_assignment -name OUTPUT_PIN_LOAD 2 -to clk_to_sdram_n[0]
set_global_assignment -name PRE_FLOW_SCRIPT_FILE "quartus_sh:auto_add_ddr_constraints.tcl"