📄 mode_detect.lst
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if (MODE_NOSUPPORT != ucMode_Found)
{
if (VIDEO_SEARCH_TIMES < ucMode_Times)
{
bLIGHT_PWR = LIGHT_OFF; // Turn off BackLight for reset display
RTDSetByte(HOSTCTRL_02, 0x40); // Wake RTD up
RTDOSDW(OSD_Reset); // Clear OSD
if (SOURCE_YUV == (stGUD1.INPUT_SOURCE & 0x07))
ucMode_Curr = (ucAV_Mode & 0x02) ? MODE_YUV50HZ : MODE_YUV60HZ;
else
ucMode_Curr = ucMode_Found;
ucMode_Times = 0;
bStable = 0; // bStable must be cleared when mode changed
Display_Video_Set();
}
}
else
{
ucMode_Times ++;
if (ucAV_Mode)
{
// Force to display although we cannot lock color
if (VIDEO_SEARCH_TIMES < ucMode_Times
&& (NO_COLOR_TIMES < ucMode_Times || SOURCE_YUV == (stGUD1.INPUT_SOURCE & 0x07)))
{
bLIGHT_PWR = LIGHT_OFF; // Turn off BackLight for reset display
RTDSetByte(HOSTCTRL_02, 0x40); // Wake RTD up
RTDOSDW(OSD_Reset); // Clear OSD
ucAV_Mode = (ucAV_Mode & 0x02) ? 0x82 : 0x81;
if (SOURCE_YUV != (stGUD1.INPUT_SOURCE & 0x07))
ucMode_Curr = (ucAV_Mode & 0x02) ? MODE_VIDEO50HZ : MODE_VIDEO60HZ;
else
ucMode_Curr = (ucAV_Mode & 0x02) ? MODE_YUV50HZ : MODE_YUV60HZ;
ucMode_Times = 0;
bStable = 0; // bStable must be cleared when mode changed
Display_Video_Set();
}
}
else
{
C51 COMPILER V7.06 MODE_DETECT 11/21/2005 13:47:38 PAGE 18
if (NO_MODE_TIMES < ucMode_Times)
{
bStable = 1; // Set bStable to 1 when signal timing is stable.
ucMode_Times = NO_MODE_TIMES - 1;
}
}
}
#else
1046 1 Display_Video_Set();
1047 1 #endif
1048 1 }
1049
1050
1051 //------------------- Check AV Mode -------------------//
1052 void Check_Video_Mode(void)
1053 {
1054 1 #if(VIDEO_CHIP != VDC_NONE)
I2CRead(ADDR_VIDEO, 0x1f, 0x01);
// Check color
if (0 == (ucAV_Mode & 0x80))
{
if (0 == (Data[0] & 0x01)) ucMode_Curr = MODE_NOSIGNAL; // Color standard changed
}
else
{
if (0 == (Data[0] & 0x01))
{
ucMode_Times = 0;
}
else
{
// When we cannot lock color, we set color standard to PAL-BDGHI if field rate is 50Hz,
// and to NTSC-M if it is 60Hz.
// If we find color is locked, we should update ucAV_Mode to indicate we now get color.
if (VIDEO_SEARCH_TIMES < ++ucMode_Times) ucAV_Mode = ucAV_Mode & 0x0f;
}
}
// Check field rate
if (Data[0] & 0x40)
{
ucMode_Curr = MODE_NOSIGNAL;
}
else
{
if (ucAV_Mode & 0x02) // 50Hz
{
if (0x00 != (Data[0] & 0x20)) ucMode_Curr = MODE_NOSIGNAL;
}
else // 60Hz
{
if (0x00 == (Data[0] & 0x20)) ucMode_Curr = MODE_NOSIGNAL;
}
}
// Check result
if (MODE_NOSIGNAL == ucMode_Curr)
Reset_Mode();
else
bStable = 1; // Set bStable to 1 when signal timing is stable.
C51 COMPILER V7.06 MODE_DETECT 11/21/2005 13:47:38 PAGE 19
#endif
1100 1 }
1101
1102
1103 void Calculate_IVS2DVS_Delay(unsigned char integer, unsigned char fraction, unsigned int DVStart)
1104 {
1105 1 if ((usIPV_ACT_STA + integer) < (DVStart >> 6))
1106 1 {
1107 2 // You should never get into this code ....
1108 2 usIPV_ACT_STA = ( DVStart >> 6) - integer;
1109 2
1110 2 RTDSetByte(IPV_ACT_STA_0A, (unsigned char)usIPV_ACT_STA);
1111 2 RTDSetByte(IPV_ACT_STA_0A + 1, (unsigned char)(usIPV_ACT_STA >> 8));
1112 2 }
1113 1
1114 1 ((unsigned int*)Data)[0] = ((usIPV_ACT_STA + integer) << 6) + ((unsigned int)fraction << 6)/10 - D
-VStart;
1115 1
1116 1
1117 1 ucDV_Delay = (unsigned char)(((unsigned int*)Data)[0] >> 6);
1118 1
1119 1 Data[6] = ((unsigned int*)Data)[0] - (ucDV_Delay << 6);
1120 1
1121 1 Data[6] = (unsigned long)usADC_Clock * Data[6] / 1024;//512;
1122 1
1123 1 RTDSetByte(FS_FT_DELAY_1E, Data[6]);
1124 1
1125 1
1126 1 }
1127
1128 void Set_Dclk(unsigned int DispLen)
1129 {
1130 1 if (Mode_Preset[ucMode_Curr][3])
1131 1 {
1132 2 // Use preset DCLK M/N code
1133 2 Data[0] = 6;
1134 2 Data[1] = Y_INC;
1135 2 Data[2] = DPLL_CTRL_D0;
1136 2 Data[3] = 0x11;
1137 2 Data[4] = (unsigned char)(Mode_Preset[ucMode_Curr][3] >> 8);
1138 2 Data[5] = (unsigned char)Mode_Preset[ucMode_Curr][3];
1139 2 Data[6] = 0;
1140 2 RTDWrite(Data);
1141 2 }
1142 1 else
1143 1 {
1144 2
1145 2 // if (VGA_Mode[ucMode_Curr][4])
1146 2 // {
1147 2 // ((unsigned int *)Data)[0] = (unsigned long)8 * usDH_Total * USER_MODE_NCODE * usDispLen
1148 2 // / ((unsigned long)usIPV_ACT_LEN * VGA_Mode[ucMode_Curr][4]);
1149 2 // }
1150 2 // else
1151 2 // {
1152 2
1153 2 ((unsigned int *)Data)[0] = (unsigned long)8 * usDH_Total * USER_MODE_NCODE * DispLen
1154 2 / ((unsigned long)usIPV_ACT_LEN * usHsync);
1155 2 // }
1156 2
1157 2
1158 2 //Original Formula : DPM/Ich = 17.6 must be constant
1159 2 //Ich = DPM * 10 / 176
C51 COMPILER V7.06 MODE_DETECT 11/21/2005 13:47:38 PAGE 20
1160 2 //2*Ich = DPM * 20 / 176 , set D0[0] to 0, then I = 2 * Ich
1161 2 //I = 2 * Ich = 2.5u + D0[3]*2.5u + D0[4]*5u + D0[5]*10u + D0[6]*20u + D0[7]*30u(A)
1162 2 //2I = 4 * Ich = 5u + D0[3]*5u + D0[4]*10u + D0[5]*20u + D0[6]*40u + D0[7]*60u(A)
1163 2 Data[15] = ((unsigned int *)Data)[0] >> 2;
1164 2 Data[5] = (unsigned int)Data[15] * 40 / 176 - 5; //Calculate the 4*Ich,
1165 2 Data[6] = 0x00;
1166 2 if(Data[5] > 60)
1167 2 {
1168 3 Data[5] -= 60;
1169 3 Data[6] |= 0x80;
1170 3 }
1171 2
1172 2 if(Data[5] > 40)
1173 2 {
1174 3 Data[5] -= 40;
1175 3 Data[6] |= 0x40;
1176 3 }
1177 2
1178 2 if(Data[5] > 20)
1179 2 {
1180 3 Data[5] -= 20;
1181 3 Data[6] |= 0x20;
1182 3 }
1183 2
1184 2 if(Data[5] > 10)
1185 2 {
1186 3 Data[5] -= 10;
1187 3 Data[6] |= 0x10;
1188 3 }
1189 2
1190 2 if(Data[5] > 5)
1191 2 {
1192 3 Data[5] -= 5;
1193 3 Data[6] |= 0x08;
1194 3 }
1195 2
1196 2
1197 2 Data[0] = 7;
1198 2 Data[1] = Y_INC;
1199 2 Data[2] = DPLL_CTRL_D0;
1200 2 Data[3] = Data[6];
1201 2 Data[4] = Data[15] - 2;
1202 2 Data[5] = 0x10 | (USER_MODE_NCODE - 2);//Offset Frequency Direction set to Downward
1203 2 //Data[5] = (USER_MODE_NCODE - 2);//Offset Frequency Direction set to Downward
1204 2 Data[6] = 0x04;
1205 2 Data[7] = 0;
1206 2 RTDWrite(Data);
1207 2
1208 2
1209 2 // ucDebug_Value0 = Data[4];
1210 2 // ucDebug_Value1 = Data[5];
1211 2
1212 2 //More precise Dclk in KHz
1213 2 ((unsigned long*)Data)[0] = (unsigned long)24576000 / usIPV_ACT_LEN * DispLen / usHsync * usDH_Total ;
1214 2 //((unsigned long*)Data)[0] = (unsigned long)49152000 / usIPV_ACT_LEN * usDispLen / usHsync * usDH
-_Total ;
1215 2 //set M/N code Dclk
1216 2 ((unsigned long*)Data)[1] = (unsigned long)12288000 * (Data[15] + 1) / USER_MODE_NCODE;
1217 2 //((unsigned long*)Data)[1] = (unsigned long)24576000 * (Data[15] + 1) / USER_MODE_NCODE;
1218 2 ((unsigned long*)Data)[2] = ((unsigned long*)Data)[1] - ((unsigned long*)Data)[0]; //Dclk offset
1219 2 ((unsigned long*)Data)[3] = ((unsigned long*)Data)[1] >> 15; //Offset resolution equal to (Dclk / 2^15)
1220 2
C51 COMPILER V7.06 MODE_DETECT 11/21/2005 13:47:38 PAGE 21
1221 2 ((unsigned long*)Data)[3] = ((((unsigned long*)Data)[2] << 1)/ ((unsigned long*)Data)[3]) & 0x00000fff;
-//Calculate the Dclk offset
1222 2 //((unsigned long*)Data)[3] = (((unsigned long*)Data)[2] / ((unsigned long*)Data)[3]) & 0x00000fff
-; //Calculate the Dclk offset
1223 2
1224 2 RTDSetByte(DCLK_OFFSET_LSB_9A,(unsigned char)((unsigned long*)Data)[3]); //Set the Dclk offset
1225 2 // ucDebug_Value0 = (unsigned char)(((unsigned long*)Data)[3]);
1226 2 //RTDSetBit(DCLK_OFFSET_MSB_9B,0xf0,(unsigned char)(((unsigned long*)Data)[3] >> 8) | 0x20);
1227 2 RTDSetBit(DCLK_OFFSET_MSB
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