sa11x1.inc

在ADS环境下LCD 测试例子

;
; Copyright (c) Microsoft Corporation.  All rights reserved.
;
;
; Use of this source code is subject to the terms of the Microsoft end-user
; license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
; If you did not accept the terms of the EULA, you are not authorized to use
; this source code. For a copy of the EULA, please see the LICENSE.RTF on your
; install media.
;
; Copyright ?1999 Intel Corp.  
;
; Need to import the board specific base addresses of SA-11X1 Chip and Daughter cards


	IF  :LNOT::DEF: sa11x1_inc
sa11x1_inc	EQU	1


SKCR_PHYSICAL		EQU	(SA11X1_BASE_PHYSICAL)
SKSMCR_PHYSICAL		EQU	(SA11X1_BASE_PHYSICAL+0x4)
;SKPCR_PHYSICAL		EQU	(SA11X1_BASE_PHYSICAL+0x400)	; clock divide		
SKPCR_PHYSICAL		EQU	(SA11X1_BASE_PHYSICAL+0x200)	; power control
;SKCDR_PHYSICAL		EQU	(SA11X1_BASE_PHYSICAL+0x40000)	; clock divide		
SKCDR_PHYSICAL		EQU	(SA11X1_BASE_PHYSICAL+0x204)	; clock divide	
SKGPIO_PA_DDR_PHYSICAL	EQU	(SA11X1_BASE_PHYSICAL+0x1000)
SKPCMCIA_PCCR_PHYSICAL	EQU	(SA11X1_BASE_PHYSICAL+0x1800)

SKCR_VIRTUAL		EQU	(SA11X1_BASE_U_VIRTUAL)
;SKPCR_VIRTUAL		EQU	(SA11X1_BASE_U_VIRTUAL+0x400)		; power control
SKPCR_VIRTUAL		EQU	(SA11X1_BASE_U_VIRTUAL+0x200)		; power control SA-1111
SKCDR_VIRTUAL		EQU	(SA11X1_BASE_U_VIRTUAL+0x204)		; clock divide

SKINTC_BASE_PHYSICAL	EQU	(SA11X1_BASE_PHYSICAL+0x160000)
SKINTENABL0_PHYSICAL	EQU	(SKINTC_BASE_PHYSICAL+0x2000)		; interrupt enable 0
SKINTENABL1_PHYSICAL	EQU	(SKINTC_BASE_PHYSICAL+0x2400)		; interrupt enable 1
SKINTPOL0_PHYSICAL	EQU	(SKINTC_BASE_PHYSICAL+0x3000)		; interrupt polarity 0
SKINTPOL1_PHYSICAL	EQU	(SKINTC_BASE_PHYSICAL+0x3400)		; interrupt polarity 1
SKINTSTCLR0_PHYSICAL	EQU	(SKINTC_BASE_PHYSICAL+0x6000)		; interrupt status/clear 0
SKINTSTCLR1_PHYSICAL	EQU	(SKINTC_BASE_PHYSICAL+0x6400)		; interrupt status/clear 1

SKINTC_BASE_VIRTUAL	EQU	(SA11X1_BASE_U_VIRTUAL+0x160000)
SKINTENABL0_VIRTUAL	EQU	(SKINTC_BASE_VIRTUAL+0x2000)		; interrupt enable 0
SKINTENABL1_VIRTUAL	EQU	(SKINTC_BASE_VIRTUAL+0x2400)		; interrupt enable 1
SKINTPOL0_VIRTUAL	EQU	(SKINTC_BASE_VIRTUAL+0x3000)		; interrupt polarity 0
SKINTPOL1_VIRTUAL	EQU	(SKINTC_BASE_VIRTUAL+0x3400)		; interrupt polarity1
SKINTSTCLR0_VIRTUAL	EQU	(SKINTC_BASE_VIRTUAL+0x6000)		; interrupt status/clear 0
SKINTSTCLR1_VIRTUAL	EQU	(SKINTC_BASE_VIRTUAL+0x6400)		; interrupt status/clear 1


; 11X1 bits
SA11X1_SLEEP		EQU	0x00000004		; sets the SA-11X1 control register to put  SA-11X1 sleep mode

SKCR_INIT		EQU	0x00000001	
SKCR_RCLK		EQU	0x00000003
SKCR_VAL		EQU	0x0000001B		; sets the 1101 control register to on
 
	ENDIF
	END