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📄 pwr_mgmt.asm

📁 This directory contains example ADSPBF535 code, written in assembly, that changes the frequency and
💻 ASM
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12 
		r7.l = 0x8006;    // Clear WD flag and disable WD events
		p0.l = WDOGCTL & 0xffff;
		p0.h = WDOGCTL >> 16;
		W[p0] = r7;
		ssync;
/**********Light LED to indicate the voltage/freq combination***********/
        r5=0x007f(z);
		W[p2]=r5;   // clear LEDs and interrupts
        ssync;
        r5=0x0000(z);
		bitset(r5,0);
		W[p1]=r5;   // Set LED4

		rti;

// change voltage to 1.3 volts and frequency to 160MHz
// first check if previous voltage setting is 1.5 volts or 1.1 volts
// if previous voltage was 1.5 volts, then change frequency to 
// 160MHz before changing voltage to 1.3 volts.  If previous voltage
// was 1.1 volts, then change voltage to 1.3 volts before changing
// frequency to 160MHz				     

one_fifty:	
		p0.l = FIO_DIR & 0xffff;
		p0.h = FIO_DIR >> 16;
		r7=W[p0];
        bitset(r7, 12);
		bitset(r7, 13);
		bitset(r7, 14);
		W[p0]=r7;
        ssync;
		r5=W[p1];
		cc=bittst(r5,13);  
		if cc jump freq_first;

		r5=0x0000(z);

		bitset(r5,14);
		W[p1]=r5;	//change voltage

		r5=0x0000(z);
		bitset(r5,12);
		bitset(r5,13);
		W[p2]=r5;

/***************change frequency*******/

		r7.l = 0xfff1;
		r7.h = 0x0000;
		p0.l = WDOGCNT & 0xffff;
		p0.h = WDOGCNT >> 16;
		[p0] = r7;
		ssync;
		
		r7.l = 0x0004;
		p0.l = WDOGCTL & 0xffff;
		p0.h = WDOGCTL >> 16;
		W[p0] = r7;
		ssync;
				
		p0.l = PLLCTL & 0xffff;  
		p0.h = PLLCTL >> 16;
		r7 = [p0];
		bitset(r7,8);           // Set bypass mode on
		[p0] = r7;              // set the PLLCTL to: PLL bypassed
		ssync;
		
		r7.l = 0x0000;
		r7.h = 0x0000;
		p0.l = WDOGSTAT & 0xffff;
		p0.h = WDOGSTAT >> 16;
		[p0] = r7;
		ssync;
		
		r7.l = 0x0004;
		p0.l = WDOGCTL & 0xffff;
		p0.h = WDOGCTL >> 16;
		W[p0] = r7;
		ssync;
		
		
		nop;
		cli r7;
		idle;
		ssync;
		sti r7;
		ssync;

		r7.l = 0x8006;    // Clear WD flag and disable WD events
		p0.l = WDOGCTL & 0xffff;
		p0.h = WDOGCTL >> 16;
		W[p0] = r7;
		ssync;


		r7.l = 0x1100;
		r7.h = 0x0001;
		p0.l = PLLCTL & 0xffff;
		p0.h = PLLCTL >> 16;
		[p0] = r7;             // set the PLLCTL to: PLL bypassed, MSEL: 8x, SSEL: CCLK/2.5
		ssync;
		
		
		p0.l = PLLCTL & 0xffff;  
		p0.h = PLLCTL >> 16;
		r7 = [p0];
		bitclr(r7,8);           // Set bypass mode off
		[p0] = r7;              // set the PLLCTL to: PLL not bypassed
		ssync;
		
		r7.l = 0x0000;
		r7.h = 0x0000;
		p0.l = WDOGSTAT & 0xffff;
		p0.h = WDOGSTAT >> 16;
		[p0] = r7;
		ssync;
		
		r7.l = 0x0004;
		p0.l = WDOGCTL & 0xffff;
		p0.h = WDOGCTL >> 16;
		W[p0] = r7;
		ssync;
		
		
		nop;
		cli r7;
		idle;
		ssync;
		sti r7;
		ssync;
		
		r7.l = 0x8006;
		p0.l = WDOGCTL & 0xffff;
		p0.h = WDOGCTL >> 16;
		W[p0] = r7;
		ssync;

/**********Light LED to indicate the voltage/freq combination***********/
        r5=0x007f(z);
		W[p2]=r5;   // clear LEDs and interrupts
        ssync;
        r5=0x0000(z);
		bitset(r5,1);
		W[p1]=r5;   // Set LED1

		rti;

freq_first:	/***************put in frequency change code here*******/
		
		
		r7.l = 0xfff1;    //Load WD counter
		r7.h = 0x0000;
		p0.l = WDOGCNT & 0xffff;
		p0.h = WDOGCNT >> 16;
		[p0] = r7;
		ssync;
		
		r7.l = 0x0004;    // Enable GP Interrupt
		p0.l = WDOGCTL & 0xffff;
		p0.h = WDOGCTL >> 16;
		W[p0] = r7;
		ssync;
		
		p0.l = PLLCTL & 0xffff;  
		p0.h = PLLCTL >> 16;
		r7 = [p0];
		bitset(r7,8);           // Set bypass mode on
		[p0] = r7;              // set the PLLCTL to: PLL bypassed
		ssync;
		
		r7.l = 0x0000;          // Reload WD counter
		r7.h = 0x0000;  
		p0.l = WDOGSTAT & 0xffff;
		p0.h = WDOGSTAT >> 16;
		[p0] = r7;
		ssync;
		
		r7.l = 0x0004;
		p0.l = WDOGCTL & 0xffff;
		p0.h = WDOGCTL >> 16;
		W[p0] = r7;
		ssync;
		
		
		nop;
		cli r7;
		idle;
        ssync;   // Enter IDLE mode to allow PLL to enter bypass state
		sti r7;  // First instruction executed when WD interrupt is generated
		         // The WD interrupt is not enabled.  The wakeup event from the WD is what 
				 // actually brings the DSP out of IDLE
		
		r7.l = 0x8006;    // Clear WD flag and disable WD events
		p0.l = WDOGCTL & 0xffff;
		p0.h = WDOGCTL >> 16;
		W[p0] = r7;
		ssync;		


		r7.l = 0x1100;
		r7.h = 0x0001;
		p0.l = PLLCTL & 0xffff;
		p0.h = PLLCTL >> 16;
		[p0] = r7;             // set the PLLCTL to: PLL bypassed, MSEL: 8x, SSEL: CCLK/2.5
		ssync;
		
		
		p0.l = PLLCTL & 0xffff;  
		p0.h = PLLCTL >> 16;
		r7 = [p0];
		bitclr(r7,8);           // Set bypass mode off
		[p0] = r7;              // set the PLLCTL to: PLL not bypassed
		ssync;
		
		r7.l = 0x0000;
		r7.h = 0x0000;
		p0.l = WDOGSTAT & 0xffff;
		p0.h = WDOGSTAT >> 16;
		[p0] = r7;
		ssync;
		
		r7.l = 0x0004;
		p0.l = WDOGCTL & 0xffff;
		p0.h = WDOGCTL >> 16;
		W[p0] = r7;
		ssync;
		
		
		nop;
		cli r7;
		idle;
		ssync;
		sti r7;
		ssync;
		
		r7.l = 0x8006;          // Clear events and disable GP interrupt
		p0.l = WDOGCTL & 0xffff;
		p0.h = WDOGCTL >> 16;
		W[p0] = r7;
		ssync;
	
		
		r5=0x0000(z);

		bitset(r5,14);
		W[p1]=r5;	//change voltage
        ssync;
		r5=0x0000(z);
		bitset(r5,13);
		bitset(r5,12);
		W[p2]=r5;

/**********Light LED to indicate the voltage/freq combination***********/
        r5=0x007f(z);
		W[p2]=r5;   // clear LEDs and interrupts
        ssync;
        r5=0x0000(z);
		bitset(r5,1);
		W[p1]=r5;   // Set LED1
		rti;

/***change voltage to 1.1 volts and frequency to 100MHz******/
/***must change frequency before changing voltage************/

		one_hundred:	
		
		r7.l = 0xfff1;
		r7.h = 0x0000;
		p0.l = WDOGCNT & 0xffff;
		p0.h = WDOGCNT >> 16;
		[p0] = r7;
		ssync;
		
		r7.l = 0x0004;
		p0.l = WDOGCTL & 0xffff;
		p0.h = WDOGCTL >> 16;
		W[p0] = r7;
		ssync;
		
		
		p0.l = PLLCTL & 0xffff;  
		p0.h = PLLCTL >> 16;
		r7 = [p0];
		bitset(r7,8);           // Set bypass mode on
		[p0] = r7;              // set the PLLCTL to: PLL bypassed
		ssync;
		
		r7.l = 0x0000;
		r7.h = 0x0000;
		p0.l = WDOGSTAT & 0xffff;
		p0.h = WDOGSTAT >> 16;
		[p0] = r7;
		ssync;
		
		r7.l = 0x0004;
		p0.l = WDOGCTL & 0xffff;
		p0.h = WDOGCTL >> 16;
		W[p0] = r7;
		ssync;
		
		
		nop;
		cli r7;
		idle;
		ssync;
		sti r7;
		ssync;

		r7.l = 0x8006;    // Clear WD flag and disable WD events
		p0.l = WDOGCTL & 0xffff;
		p0.h = WDOGCTL >> 16;
		W[p0] = r7;
		ssync;
		
		r7.l = 0x0B00;
		r7.h = 0x0001;
		p0.l = PLLCTL & 0xffff;
		p0.h = PLLCTL >> 16;
		[p0] = r7;             // set the PLLCTL to: PLL bypassed, MSEL: 5x, SSEL: CCLK/2.5
		ssync;
		
		
		p0.l = PLLCTL & 0xffff;  
		p0.h = PLLCTL >> 16;
		r7 = [p0];
		bitclr(r7,8);           // Set bypass mode off
		[p0] = r7;              // set the PLLCTL to: PLL not bypassed
		ssync;
		
		r7.l = 0x0000;
		r7.h = 0x0000;
		p0.l = WDOGSTAT & 0xffff;
		p0.h = WDOGSTAT >> 16;
		[p0] = r7;
		ssync;
		
		r7.l = 0x0004;
		p0.l = WDOGCTL & 0xffff;
		p0.h = WDOGCTL >> 16;
		W[p0] = r7;
		ssync;
		
		
		nop;
		cli r7;
		idle;
		ssync;
		sti r7;
		ssync;
		
		r7.l = 0x8006;        // clear WD events and disable GP interrupt
		p0.l = WDOGCTL & 0xffff;
		p0.h = WDOGCTL >> 16;
		W[p0] = r7;
		ssync;

		p0.l = FIO_DIR & 0xffff;
		p0.h = FIO_DIR >> 16;
		r7=W[p0];
		bitset(r7, 12);
		bitset(r7, 13);
		bitset(r7, 14);
		W[p0]=r7;


		r5=0x0000(z);
		bitset(r5,13);
		W[p1]=r5;	//change voltage
        ssync;

		r5=0x0000(z);
		bitset(r5,12);
		bitset(r5,14);
		W[p2]=r5;	//change voltage
        ssync;


/**********Light LED to indicate the voltage/freq combination***********/
        r5=0x007f(z);
		W[p2]=r5;   // clear LEDs and interrupts
		ssync;
        r5=0x0000(z);
		bitset(r5,2);
		W[p1]=r5;   // Set LED2
		rti;

_I13HANDLER:	      // IVG 13 Handler
    RTI;

_I14HANDLER:
    RTI;

_I15HANDLER:
    RTI;
12

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