📄 main.c
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/*****************************************************************************************/
//
// Name: BF561 EZ-KIT General Purpose Timers Example
//
/*****************************************************************************************
(C) Copyright 2003 - Analog Devices, Inc. All rights reserved.
File Name: main.c
Date Modified: 10/28/03 PK Rev 1.0
Software: VisualDSP++3.5
Hardware: BF561 EZ-KIT Board Rev 1.0
Hardware Setup: On the EZ-KIT expansion interface J2, connect a wire
across pins 57 and 58 (PF0 and PF1). This enables a
timer loopback.
Purpose: Demonstrates the functionality of the general purpose
timers on the ADSP-BF561. Timer0 is configured as a
PWM output and Timer1 is a pulse width capture input.
The output of Timer0 is looped back to Timer1 which
measures the pulse width and period of the incoming
waveform. An interrupt is generated at the end of
each period and a period counter is incremented in
an ISR. After 25 periods have expired, execution
is halted.
******************************************************************************************/
#include "cdefBF561.h"
#include "ccblkfn.h"
#include <stdio.h>
#include <sys\exception.h>
#include "main.h"
// Timer Interrupt Handler Prototype
EX_INTERRUPT_HANDLER(Timer1_ISR);
char period_count;
// User program
void main() {
period_count = 0;
// unblock Core B if dual core operation is desired
#ifndef RUN_ON_SINGLE_CORE
*pSICA_SYSCR &= 0xFFDF; // clear bit 5 to unlock
#endif
// set Clocks
Set_PLL( (short)(CORECLK/CLKIN), (short)(CORECLK/SYSCLK)); // sets Core clock to 600MHz (= 18 x 33MHz) and SCLK to 120MHz (=600Mhz / 5)
// initialise SDRAM
InitSDRAM();
// assign ISR to interrupt vector
register_handler(ik_ivg10, Timer1_ISR); // Timer0 ISR -> IVG 10
// enable Timer1 interrupt
*pSICA_IMASK1 = 0x10;
// Initialize Timer0 for PWM Output mode
*pTIMER0_CONFIG = 0x9;
asm("ssync;");
*pTIMER0_PERIOD = 0x00800000;
*pTIMER0_WIDTH = 0x00400000;
// Initialize Timer1 for Pulse Width Count and Capture mode
*pTIMER1_CONFIG = 0x1A;
asm("ssync;");
// Enable Timers 0 and 1
*pTMRS8_ENABLE = 0x0003;
while(period_count <= 25)
asm("nop;");
} // main
EX_INTERRUPT_HANDLER(Timer1_ISR)
{
// Clear Timer1 Interrupt
*pTMRS8_STATUS = 0x0002;
// Increment Period Counter
period_count +=1;
}
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