📄 startup.s
字号:
2
ldr r8,=I_PMST ;INTMSK work-around.
ldr r9,[r8]
str r9,[r8]
ldmfd sp!,{r8-r9}
add sp,sp,#4
subs pc,lr,#4
;****************************************************
;* START *
;****************************************************
ResetHandler
ldr r0, =WTCON ;watch dog disable
ldr r1, =0x0
str r1, [r0]
ldr r0, =INTMSK
ldr r1, =0x07ffffff ;all interrupt disable
str r1, [r0]
;****************************************************
;* Set clock control registers *
;****************************************************
ldr r0, =LOCKTIME
ldr r1, =0xfff
str r1, [r0]
[ PLLONSTART
ldr r0, =PLLCON ;temporary setting of PLL
ldr r1, =((M_DIV<<12)+(P_DIV<<4)+S_DIV) ;Fin=10MHz,Fout=60MHz
str r1, [r0]
]
ldr r0, =CLKCON
ldr r1, =0x7ff8 ;All unit block CLK enable
str r1, [r0]
;****************************************
;* change BDMACON reset value for BDMA *
;****************************************
ldr r0, =BDIDES0
ldr r1, =0x40000000 ;BDIDESn reset value should be 0x40000000
str r1, [r0]
ldr r0, =BDIDES1
ldr r1, =0x40000000 ;BDIDESn reset value should be 0x40000000
str r1, [r0]
;****************************************************
;* Set memory control registers *
;****************************************************
ldr r0,=SMRDATA
ldmia r0,{r1-r13}
ldr r0,=0x01c80000 ;BWSCON Address
stmia r0,{r1-r13}
;****************************************************
;* Initialize stacks *
;* current is SVC mode, after boot *
;****************************************************
ldr sp, =SvcStackBase ;this could not be executed, if InitStacks is not a C function
;must be executed, because stack is nedded if InitStacks is a C function
bl InitStacks
;****************************************************
;* Setup IRQ handler *
;****************************************************
ldr r0, =HandleIRQ ;This routine is needed
ldr r1, =IsrIRQ ;if there is not 'subs pc,lr,#4' at 0x18, 0x1c
str r1, [r0]
;****************************************************
;* Setup SWI handler *
;****************************************************
ldr r0, =HandleSWI
ldr r1, =SoftwareInterrupt
str r1, [r0]
b __main
;****************************************************
;* The function for initializing stack *
;****************************************************
InitStacks
;Do not use DRAM,such as stmfd,ldmfd......
;SVCstack is initialized before
;Under toolkit ver 2.50, 'msr cpsr,r1' can be used instead of 'msr cpsr_cxsf,r1'
mov r2, lr ;save return address, current mode is SVCMODE
mrs r0, cpsr
bic r0, r0, #MODEMASK
orr r1, r0, #UNDEFMODE|NOINT
msr cpsr_cxsf, r1 ;UndefMode
ldr sp, =UndefStackBase
orr r1, r0, #ABORTMODE|NOINT
msr cpsr_cxsf, r1 ;AbortMode
ldr sp, =AbortStackBase
orr r1, r0, #IRQMODE|NOINT
msr cpsr_cxsf, r1 ;IrqMode
ldr sp, =IrqStackBase
orr r1, r0, #FIQMODE|NOINT
msr cpsr_cxsf, r1 ;FiqMode
ldr sp, =FiqStackBase
orr r1, r0, #SVCMODE|NOINT
msr cpsr_cxsf, r1 ;SvcMode
ldr sp, =SvcStackBase
bic r0, r0, #MODEMASK|NOINT
orr r1, r0, #SYSMODE
msr cpsr_cxsf, r1 ;SysMode
ldr sp, =SysStackBase
;USER mode is not initialized
mov pc, r2 ;use R2 save return address before
;The LR register may be not valid for the mode changes
__user_initial_stackheap
ldr r0, =HeapBase
ldr r2, =HeapLimit
ldr r3, =StackLimit
ldr r1, =SysStackBase
mov pc, lr
;**********************************************************************
;* The function for disable interrupt *
;* This functions works only if the processor is in previliged mode *
;**********************************************************************
;vDisableInterrupt
; mrs r0,cpsr
; orr r0,r0,#NOINT
; msr cpsr_cxsf,r0
; mov pc,lr
;**********************************************************************
;* The function for enable interrupt *
;* This functions works only if the processor is in previliged mode *
;**********************************************************************
;vEnableInterrupt
; mrs r0,cpsr
; bic r0,r0,#NOINT
; msr cpsr_cxsf,r0
; mov pc,lr
LTORG
SMRDATA DATA
;*****************************************************************
;* Memory configuration has to be optimized for best performance *
;* The following parameter is not optimized. *
;*****************************************************************
;*** memory access cycle parameter strategy ***
; 1) Even FP-DRAM, EDO setting has more late fetch point by half-clock
; 2) The memory settings,here, are made the safe parameters even at 66Mhz.
; 3) FP-DRAM Parameters:tRCD=3 for tRAC, tcas=2 for pad delay, tcp=2 for bus load.
; 4) DRAM refresh rate is for 40Mhz.
[ BUSWIDTH=16
DCD 0x11000012 ;Bank0=OM[1:0], Bank1=16bit, Bank2-Bank5=8bit, Bank6-Bank7=16bit
| ;BUSWIDTH=32
DCD 0x22222220 ;Bank0=OM[1:0], Bank1~Bank7=32bit
]
DCD ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) ;GCS0
DCD ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) ;GCS1
DCD ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) ;GCS2
DCD ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) ;GCS3
DCD ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) ;GCS4
DCD ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) ;GCS5
[ BDRAMTYPE="DRAM"
DCD ((B6_MT<<15)+(B6_Trcd<<4)+(B6_Tcas<<3)+(B6_Tcp<<2)+(B6_CAN)) ;GCS6 check the MT value in parameter.a
DCD ((B7_MT<<15)+(B7_Trcd<<4)+(B7_Tcas<<3)+(B7_Tcp<<2)+(B7_CAN)) ;GCS7
| ;"SDRAM"
DCD ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) ;GCS6
DCD ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) ;GCS7
]
DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) ;REFRESH RFEN=1, TREFMD=0, trp=3clk, trc=5clk, tchr=3clk,count=1019
DCD 0x17 ;SCLK power down mode, BANKSIZE 16M/16M
DCD 0x20 ;MRSR6 CL=2clk
DCD 0x20 ;MRSR7
PRESERVE8
AREA Heap_Base, DATA, NOINIT, READWRITE
LTORG
HeapBase SPACE 0
PRESERVE8
AREA Heap_Limit, DATA, NOINIT, READWRITE
LTORG
HeapLimit SPACE 0
PRESERVE8
AREA Stack_Limit, DATA, NOINIT, READWRITE
LTORG
StackLimit SPACE 0
;the stack increase from high address to low address
PRESERVE8
AREA Stacks, DATA, NOINIT, READWRITE
LTORG
SysStackLimit SPACE SYS_STACKLENGTH*4
SysStackBase SPACE 0
SvcStackLimit SPACE SVC_STACKLENGTH*4
SvcStackBase SPACE 0
UndefStackLimit SPACE UNDEF_STACKLENGTH*4
UndefStackBase SPACE 0
AbortStackLimit SPACE ABORT_STACKLENGTH*4
AbortStackBase SPACE 0
IrqStackLimit SPACE IRQ_STACKLENGTH*4
IrqStackBase SPACE 0
FiqStackLimit SPACE FIRQ_STACKLENGTH*4
FiqStackBase SPACE 0
PRESERVE8
AREA Isr_Table, DATA, NOINIT, READWRITE
LTORG
; ^ _ISR_STARTADDRESS ;0xC7FFF00
HandleReset SPACE 4
HandleUndef SPACE 4
HandleSWI SPACE 4
HandlePabort SPACE 4
HandleDabort SPACE 4
HandleReserved SPACE 4
HandleIRQ SPACE 4
HandleFIQ SPACE 4
;Do not use the label 'IntVectorTable',
;because armasm.exe can not recognize this label correctly.
;the value is different with an address you think it may be.
;IntVectorTable
HandleADC SPACE 4
HandleRTC SPACE 4
HandleUTXD1 SPACE 4
HandleUTXD0 SPACE 4
HandleSIO SPACE 4
HandleIIC SPACE 4
HandleURXD1 SPACE 4
HandleURXD0 SPACE 4
HandleTIMER5 SPACE 4
HandleTIMER4 SPACE 4
HandleTIMER3 SPACE 4
HandleTIMER2 SPACE 4
HandleTIMER1 SPACE 4
HandleTIMER0 SPACE 4
HandleUERR01 SPACE 4
HandleWDT SPACE 4
HandleBDMA1 SPACE 4
HandleBDMA0 SPACE 4
HandleZDMA1 SPACE 4
HandleZDMA0 SPACE 4
HandleTICK SPACE 4
HandleEINT4567 SPACE 4
HandleEINT3 SPACE 4
HandleEINT2 SPACE 4
HandleEINT1 SPACE 4
HandleEINT0 SPACE 4 ;0xc1(c7)fff84
PRESERVE8
AREA Vector_Table, CODE, READONLY
HandlerFIQ HANDLER HandleFIQ
HandlerIRQ HANDLER HandleIRQ
HandlerUndef HANDLER HandleUndef
HandlerSWI HANDLER HandleSWI
HandlerDabort HANDLER HandleDabort
HandlerPabort HANDLER HandlePabort
;The following is used for the vectored interrupt.
HandlerADC VHANDLER HandleADC
HandlerRTC VHANDLER HandleRTC
HandlerUTXD1 VHANDLER HandleUTXD1
HandlerUTXD0 VHANDLER HandleUTXD0
HandlerSIO VHANDLER HandleSIO
HandlerIIC VHANDLER HandleIIC
HandlerURXD1 VHANDLER HandleURXD1
HandlerURXD0 VHANDLER HandleURXD0
HandlerTIMER5 VHANDLER HandleTIMER5
HandlerTIMER4 VHANDLER HandleTIMER4
HandlerTIMER3 VHANDLER HandleTIMER3
HandlerTIMER2 VHANDLER HandleTIMER2
HandlerTIMER1 VHANDLER HandleTIMER1
HandlerTIMER0 VHANDLER HandleTIMER0
HandlerUERR01 VHANDLER HandleUERR01
HandlerWDT VHANDLER HandleWDT
HandlerBDMA1 VHANDLER HandleBDMA1
HandlerBDMA0 VHANDLER HandleBDMA0
HandlerZDMA1 VHANDLER HandleZDMA1
HandlerZDMA0 VHANDLER HandleZDMA0
HandlerTICK VHANDLER HandleTICK
HandlerEINT4567 VHANDLER HandleEINT4567
HandlerEINT3 VHANDLER HandleEINT3
HandlerEINT2 VHANDLER HandleEINT2
HandlerEINT1 VHANDLER HandleEINT1
HandlerEINT0 VHANDLER HandleEINT0
END⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -