startup.s

ucosII 2.84版源码

; *******************************************************
; * NAME    : 44BINIT.S									*
; * Version : 10.April.2000								*
; * Description:										*
; *	C start up codes									*
; *	Configure memory, Initialize ISR ,stacks			*
; *	Initialize C-variables								*
; *	Fill zeros into zero-initialized C-variables		*
; *******************************************************
 
	GET option.s
	GET memcfg.s


;Interrupt Control
INTPND		EQU	0x01E00004
INTMOD		EQU	0x01E00008
INTMSK		EQU	0x01E0000C
I_ISPR		EQU	0x01E00020
I_CMST		EQU	0x01E0001C
I_PMST		EQU	0x01E00014

;Watchdog timer
WTCON	EQU	0x01D30000

;Clock Controller
PLLCON		EQU	0x01D80000
CLKCON		EQU	0x01D80004
LOCKTIME	EQU	0x01D8000C
	
;Memory Controller
REFRESH		EQU	0x01C80024

;BDMA destination register
BDIDES0		EQU	0x1F80008
BDIDES1		EQU	0x1F80028

;Pre-defined constants
USERMODE	EQU	0x10
FIQMODE		EQU	0x11
IRQMODE		EQU	0x12
SVCMODE		EQU	0x13
ABORTMODE	EQU	0x17
UNDEFMODE	EQU	0x1B
SYSMODE		EQU	0x1F

MODEMASK	EQU	0x1F
NOINT		EQU	0x80

SYS_STACKLENGTH		EQU	4096
SVC_STACKLENGTH		EQU	4096
UNDEF_STACKLENGTH	EQU	2048
ABORT_STACKLENGTH	EQU	2048
IRQ_STACKLENGTH		EQU	2048
FIRQ_STACKLENGTH	EQU	2048


;check if tasm.exe is used.
	GBLL THUMBCODE
	[ {CONFIG} = 16	
THUMBCODE SETL {TRUE}
	CODE32
	|   
THUMBCODE SETL {FALSE}
	]

	[ THUMBCODE
	CODE32   ;for start-up code for Thumb mode
	]


	IMPORT __main
	IMPORT __use_no_semihosting_swi
	IMPORT SoftwareInterrupt
	IMPORT OSIntNesting
	IMPORT OsEnterSum
	IMPORT OSTCBHighRdy
	IMPORT OSIntCtxSw
	IMPORT OSIntExit
	IMPORT OSTCBCur
    
	EXPORT __user_initial_stackheap
	EXPORT SvcStackBase


	MACRO
$HandlerLabel HANDLER $HandleLabel
	
$HandlerLabel
	sub		sp,sp,#4	    ;decrement sp(to store jump address)
	stmfd	sp!,{r0}	    ;PUSH the work register to stack(lr does not push because it return to original address)
	ldr		r0,=$HandleLabel;load the address of HandleXXX to r0
	ldr		r0,[r0]	        ;load the contents(service routine start address) of HandleXXX
	str		r0,[sp,#4]	    ;store the contents(ISR) of HandleXXX to stack
	ldmfd	sp!,{r0,pc}	    ;POP the work register and pc(jump to ISR)
	MEND

;	MACRO
;$HandlerLabel VHANDLER $HandleLabel
;
;$HandlerLabel
;	sub		sp,sp,#4
;	stmfd	sp!,{r0}
;	ldr		r0,=I_ISPR ;INTMSK work-around
;	ldr		r0,[r0]
;	cmp		r0,#0x0
;	beq		%F0
;	ldr		r0,=$HandleLabel
;	ldr		r0,[r0]
;	str		r0,[sp,#4]
;	ldmfd	sp!,{r0,pc}
;0
;	stmfd	sp!,{r1}
;	ldr		r0,=I_PMST
;	ldr		r1,[r0]
;	str		r1,[r0]
;	
;	ldmfd	sp!,{r0,r1}
;	add		sp,sp,#4
;	subs	pc,lr,#4
;	MEND

	MACRO
$HandlerLabel VHANDLER $HandleLabel
	
$HandlerLabel
	SUB		LR,LR,#4
	STMFD	SP!,{R0-R3,R12,LR}
	MRS		R3,SPSR
	STMFD	SP,{R3,R4,SP,LR}^
	
	LDR		R2,=OSIntNesting
	LDRB	R1,[R2]
	ADD		R1,R1,#1
	STRB	R1,[R2]
	
	SUB		SP,SP,#4*4
	
	MSR		CPSR_c,#(NOINT | SYSMODE)
	CMP		R1,#1
	LDREQ	SP,=SysStackBase		;??

	LDR		R0,=$HandleLabel
	MOV		LR,PC
    LDR		PC,[R0]

    MSR		CPSR_c,#(NOINT | SYSMODE)
    LDR		R2,=OsEnterSum
    MOV		R1,#1
    STR		R1,[R2]

    BL		OSIntExit

    LDR		R2,=OsEnterSum
    MOV		R1,#0
    STR		R1,[R2]

    MSR		CPSR_c,#(NOINT | IRQMODE)
    LDMFD	SP,{R3,R4,SP,LR}^

    LDR		R0,=OSTCBHighRdy
    LDR		R0,[R0]
    LDR		R1,=OSTCBCur
    LDR		R1,[R1]
    CMP		R0,R1

    ADD		SP,SP,#4*4
    MSR		SPSR_cxsf,R3
    LDMEQFD	SP!,{R0-R3,R12,PC}^
    LDR		PC,=OSIntCtxSw

    MEND



	PRESERVE8
	AREA Init, CODE, READONLY

	ENTRY 
	ldr		pc, =ResetHandler	;for debug
	ldr		pc, =HandlerUndef	;handlerUndef
	ldr		pc, =HandlerSWI		;SWI interrupt handler
	ldr		pc, =HandlerPabort	;handlerPAbort
	ldr		pc, =HandlerDabort	;handlerDAbort
	b		.					;handlerReserved
	subs	pc, lr, #4			;b HandlerIRQ
	subs	pc, lr, #4			;b HandlerFIQ
	;***IMPORTANT NOTE***
	;If the H/W vectored interrutp mode is enabled, The above two instructions should
	;be changed like below, to work-around with H/W bug of S3C44B0X interrupt controller. 
	; b HandlerIRQ  ->  subs pc,lr,#4
	; b HandlerIRQ  ->  subs pc,lr,#4

VECTOR_BRANCH
	ldr		pc, =HandlerEINT0		;0x20;mGA    H/W interrupt vector table
	ldr		pc, =HandlerEINT1		;0x24;
	ldr		pc, =HandlerEINT2		;0x28;
	ldr		pc, =HandlerEINT3		;0x2C;
	ldr		pc, =HandlerEINT4567	;0x30;
	ldr		pc, =HandlerTICK		;0x34;mGA
	ldr		pc, =HandlerDef			;0x38
	ldr		pc, =HandlerDef			;0x3C
	ldr		pc, =HandlerZDMA0		;0x40;mGB
	ldr		pc, =HandlerZDMA1		;0x44
	ldr		pc, =HandlerBDMA0		;0x48
	ldr		pc, =HandlerBDMA1		;0x4C
	ldr		pc, =HandlerWDT			;0x50
	ldr		pc, =HandlerUERR01		;0x54;mGB
	ldr		pc, =HandlerDef			;0x58
	ldr		pc, =HandlerDef			;0x5C
	ldr		pc, =HandlerTIMER0		;0x60;mGC
	ldr		pc, =HandlerTIMER1		;0x64
	ldr		pc, =HandlerTIMER2		;0x68
	ldr		pc, =HandlerTIMER3		;0x6C
	ldr		pc, =HandlerTIMER4		;0x70
	ldr		pc, =HandlerTIMER5		;0x74;mGC
	ldr		pc, =HandlerDef			;0x78
	ldr		pc, =HandlerDef			;0x7C
	ldr		pc, =HandlerURXD0		;0x80;mGD
	ldr		pc, =HandlerURXD1		;0x84
	ldr		pc, =HandlerIIC			;0x88
	ldr		pc, =HandlerSIO			;0x8C
	ldr		pc, =HandlerUTXD0		;0x90
	ldr		pc, =HandlerUTXD1		;0x94;mGD
	ldr		pc, =HandlerDef			;0x98
	ldr		pc, =HandlerDef			;0x9C
	ldr		pc, =HandlerRTC			;0xA0;mGKA
	ldr		pc, =HandlerDef			;0xA4
	ldr		pc, =HandlerDef			;0xA8
	ldr		pc, =HandlerDef			;0xAC
	ldr		pc, =HandlerDef			;0xB0
	ldr		pc, =HandlerDef			;0xB4
	ldr		pc, =HandlerDef			;0xB8
	ldr		pc, =HandlerDef			;0xBC
	ldr		pc, =HandlerADC			;0xC0;mGKB
	ldr		pc, =HandlerDef			;0xC4
	ldr		pc, =HandlerDef			;0xC8
	ldr		pc, =HandlerDef			;0xCC
	ldr		pc, =HandlerDef			;0xD0
	ldr		pc, =HandlerDef			;0xD4
	ldr		pc, =HandlerDef			;0xD8
	ldr		pc, =HandlerDef			;0xDC

;	LTORG
;
;HandlerFIQ		HANDLER HandleFIQ
;HandlerIRQ		HANDLER HandleIRQ
;HandlerUndef	HANDLER HandleUndef
;HandlerSWI		HANDLER HandleSWI
;HandlerDabort	HANDLER HandleDabort
;HandlerPabort	HANDLER HandlePabort
;
;;The following is used for the vectored interrupt.
;HandlerADC		VHANDLER HandleADC
;HandlerRTC		VHANDLER HandleRTC
;HandlerUTXD1	VHANDLER HandleUTXD1
;HandlerUTXD0	VHANDLER HandleUTXD0
;HandlerSIO		VHANDLER HandleSIO
;HandlerIIC		VHANDLER HandleIIC
;HandlerURXD1	VHANDLER HandleURXD1
;HandlerURXD0	VHANDLER HandleURXD0
;HandlerTIMER5	VHANDLER HandleTIMER5
;HandlerTIMER4	VHANDLER HandleTIMER4
;HandlerTIMER3	VHANDLER HandleTIMER3
;HandlerTIMER2	VHANDLER HandleTIMER2
;HandlerTIMER1	VHANDLER HandleTIMER1
;HandlerTIMER0	VHANDLER HandleTIMER0
;HandlerUERR01	VHANDLER HandleUERR01
;HandlerWDT		VHANDLER HandleWDT
;HandlerBDMA1	VHANDLER HandleBDMA1
;HandlerBDMA0	VHANDLER HandleBDMA0
;HandlerZDMA1	VHANDLER HandleZDMA1
;HandlerZDMA0	VHANDLER HandleZDMA0
;HandlerTICK		VHANDLER HandleTICK
;HandlerEINT4567	VHANDLER HandleEINT4567
;HandlerEINT3	VHANDLER HandleEINT3
;HandlerEINT2	VHANDLER HandleEINT2
;HandlerEINT1	VHANDLER HandleEINT1
;HandlerEINT0	VHANDLER HandleEINT0

HandlerDef	;INTMSK work-around
	stmfd	sp!, {r0,r1}
	ldr		r0, =I_PMST
	ldr		r1, [r0]
	str		r1, [r0]
	ldmfd	sp!, {r0,r1}
	subs	pc, lr, #4

IsrIRQ	;using I_ISPR register.
	sub		sp, sp, #4       ;reserved for PC
	stmfd	sp!, {r8-r9}   
	
	;IMPORTANT CAUTION
	;if I_ISPC is not used properly, I_ISPR can be 0 in this routine.
	
	ldr		r9, =I_ISPR
	ldr		r9, [r9]
	   		
	cmp		r9, #0x0	;If the IDLE mode work-around is used,
						;r9 may be 0 sometimes.
	beq		%F2
	   		
	mov		r8,#0x0
0
	movs	r9,r9,lsr #1
	bcs		%F1
	add		r8,r8,#4
	b		%B0
	
1
	ldr		r9,=HandleADC
	add		r9,r9,r8
	ldr		r9,[r9]
	str		r9,[sp,#8]
	ldmfd	sp!,{r8-r9,pc}