📄 1602b_lcd_prj.lst
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0148 E021 LDI R18,1
0149 91000075 LDS R16,ch
014B DF85 RCALL _LCD_set_xy
(0049) LCD_write_char(0,love[ch1]);
014C E381 LDI R24,0x31
014D E090 LDI R25,0
014E 91E00063 LDS R30,ch1
0150 27FF CLR R31
0151 0FE8 ADD R30,R24
0152 1FF9 ADC R31,R25
0153 9124 LPM R18,0(Z)
0154 2733 CLR R19
0155 2700 CLR R16
0156 2711 CLR R17
0157 DF12 RCALL _LCD_write_char
(0050) ch++;
0158 91800075 LDS R24,ch
015A 5F8F SUBI R24,0xFF
015B 93800075 STS ch,R24
(0051) ch1++;
015D 91800063 LDS R24,ch1
015F 5F8F SUBI R24,0xFF
0160 93800063 STS ch1,R24
(0052) if(ch>15)
0162 E08F LDI R24,0xF
0163 90200075 LDS R2,ch
0165 1582 CP R24,R2
0166 F420 BCC 0x016B
(0053) {ch=ch-16;
0167 2D82 MOV R24,R2
0168 5180 SUBI R24,0x10
0169 93800075 STS ch,R24
(0054) }
(0055) if(ch1>16)
016B E180 LDI R24,0x10
016C 90200063 LDS R2,ch1
016E 1582 CP R24,R2
016F F460 BCC 0x017C
(0056) {ch1=0;
0170 2422 CLR R2
0171 92200063 STS ch1,R2
(0057) ch=0;
0173 92200075 STS ch,R2
(0058) LCD_write_string(0,1," ");}
0175 E684 LDI R24,0x64
0176 E090 LDI R25,0
0177 8399 STD Y+1,R25
0178 8388 STD Y+0,R24
0179 E021 LDI R18,1
017A 2700 CLR R16
017B DF66 RCALL _LCD_write_string
017C 9622 ADIW R28,2
017D D11B RCALL pop_lset
017E 9518 RETI
_write_h:
temp --> R20
h --> R22
017F D0E9 RCALL push_gset2
0180 2F60 MOV R22,R16
(0059) }
(0060) void write_h(unsigned char h)
(0061) { unsigned char temp=0;
0181 2744 CLR R20
(0062) LCD_set_xy(0,0);
0182 2722 CLR R18
0183 2700 CLR R16
0184 DF4C RCALL _LCD_set_xy
(0063) temp=h/10;
0185 E01A LDI R17,0xA
0186 2F06 MOV R16,R22
0187 D0BF RCALL div8u
0188 2F40 MOV R20,R16
(0064) LCD_write_char(0,table[temp]);
0189 E286 LDI R24,0x26
018A E090 LDI R25,0
018B 2FE4 MOV R30,R20
018C 27FF CLR R31
018D 0FE8 ADD R30,R24
018E 1FF9 ADC R31,R25
018F 9124 LPM R18,0(Z)
0190 2733 CLR R19
0191 2700 CLR R16
0192 2711 CLR R17
0193 DED6 RCALL _LCD_write_char
(0065) temp=h%10;
0194 E01A LDI R17,0xA
0195 2F06 MOV R16,R22
0196 D0AE RCALL mod8u
0197 2F40 MOV R20,R16
(0066) LCD_write_char(0,table[temp]);
0198 E286 LDI R24,0x26
0199 E090 LDI R25,0
019A 2FE4 MOV R30,R20
019B 27FF CLR R31
019C 0FE8 ADD R30,R24
019D 1FF9 ADC R31,R25
019E 9124 LPM R18,0(Z)
019F 2733 CLR R19
01A0 2700 CLR R16
01A1 2711 CLR R17
01A2 DEC7 RCALL _LCD_write_char
(0067) LCD_write_char(0,':');
01A3 E32A LDI R18,0x3A
01A4 E030 LDI R19,0
01A5 2700 CLR R16
01A6 2711 CLR R17
01A7 DEC2 RCALL _LCD_write_char
01A8 D0B4 RCALL pop_gset2
01A9 9508 RET
_write_m:
temp --> R20
m --> R22
01AA D0BE RCALL push_gset2
01AB 2F60 MOV R22,R16
(0068) }
(0069)
(0070) void write_m(unsigned char m)
(0071) { unsigned char temp=0;
01AC 2744 CLR R20
(0072) LCD_set_xy(3,0);
01AD 2722 CLR R18
01AE E003 LDI R16,3
01AF DF21 RCALL _LCD_set_xy
(0073) temp=m/10;
01B0 E01A LDI R17,0xA
01B1 2F06 MOV R16,R22
01B2 D094 RCALL div8u
01B3 2F40 MOV R20,R16
(0074) LCD_write_char(0,table[temp]);
01B4 E286 LDI R24,0x26
01B5 E090 LDI R25,0
01B6 2FE4 MOV R30,R20
01B7 27FF CLR R31
01B8 0FE8 ADD R30,R24
01B9 1FF9 ADC R31,R25
01BA 9124 LPM R18,0(Z)
01BB 2733 CLR R19
01BC 2700 CLR R16
01BD 2711 CLR R17
01BE DEAB RCALL _LCD_write_char
(0075) temp=m%10;
01BF E01A LDI R17,0xA
01C0 2F06 MOV R16,R22
01C1 D083 RCALL mod8u
01C2 2F40 MOV R20,R16
(0076) LCD_write_char(0,table[temp]);
01C3 E286 LDI R24,0x26
01C4 E090 LDI R25,0
01C5 2FE4 MOV R30,R20
01C6 27FF CLR R31
01C7 0FE8 ADD R30,R24
01C8 1FF9 ADC R31,R25
01C9 9124 LPM R18,0(Z)
01CA 2733 CLR R19
01CB 2700 CLR R16
01CC 2711 CLR R17
01CD DE9C RCALL _LCD_write_char
(0077) LCD_write_char(0,':');
01CE E32A LDI R18,0x3A
01CF E030 LDI R19,0
01D0 2700 CLR R16
01D1 2711 CLR R17
01D2 DE97 RCALL _LCD_write_char
01D3 D089 RCALL pop_gset2
01D4 9508 RET
_write_s:
temp --> R20
s --> R22
01D5 D093 RCALL push_gset2
01D6 2F60 MOV R22,R16
(0078) }
(0079)
(0080) void write_s(unsigned char s)
(0081) { unsigned char temp=0;
01D7 2744 CLR R20
(0082) LCD_set_xy(6,0);
01D8 2722 CLR R18
01D9 E006 LDI R16,6
01DA DEF6 RCALL _LCD_set_xy
(0083) temp=s/10;
01DB E01A LDI R17,0xA
01DC 2F06 MOV R16,R22
01DD D069 RCALL div8u
01DE 2F40 MOV R20,R16
(0084) LCD_write_char(0,table[temp]);
01DF E286 LDI R24,0x26
01E0 E090 LDI R25,0
01E1 2FE4 MOV R30,R20
01E2 27FF CLR R31
01E3 0FE8 ADD R30,R24
01E4 1FF9 ADC R31,R25
01E5 9124 LPM R18,0(Z)
01E6 2733 CLR R19
01E7 2700 CLR R16
01E8 2711 CLR R17
01E9 DE80 RCALL _LCD_write_char
(0085) temp=s%10;
01EA E01A LDI R17,0xA
01EB 2F06 MOV R16,R22
01EC D058 RCALL mod8u
01ED 2F40 MOV R20,R16
(0086) LCD_write_char(0,table[temp]);
01EE E286 LDI R24,0x26
01EF E090 LDI R25,0
01F0 2FE4 MOV R30,R20
01F1 27FF CLR R31
01F2 0FE8 ADD R30,R24
01F3 1FF9 ADC R31,R25
01F4 9124 LPM R18,0(Z)
01F5 2733 CLR R19
01F6 2700 CLR R16
01F7 2711 CLR R17
01F8 DE71 RCALL _LCD_write_char
01F9 D063 RCALL pop_gset2
01FA 9508 RET
(0087) }
(0088)
(0089) void main(void)
(0090) { unsigned char i=0b000001;
_main:
i --> R20
01FB E041 LDI R20,1
(0091)
(0092) OSCCAL=0XBA;
01FC EB8A LDI R24,0xBA
01FD BF81 OUT 0x31,R24
(0093)
(0094) DDRD |= LCD_DATA | LCD_RW;
01FE B381 IN R24,0x11
01FF 6F88 ORI R24,0xF8
0200 BB81 OUT 0x11,R24
(0095) DDRC |= LCD_RS | LCD_EN;
0201 B384 IN R24,0x14
0202 6380 ORI R24,0x30
0203 BB84 OUT 0x14,R24
(0096)
(0097) LCD_init();
0204 DE47 RCALL _LCD_init
(0098) LCD_write_char(0x01,0);
0205 2722 CLR R18
0206 2733 CLR R19
0207 E001 LDI R16,1
0208 E010 LDI R17,0
0209 DE60 RCALL _LCD_write_char
(0099) //stop errant interrupts until set up
(0100) CLI(); //disable all interrupts
020A 94F8 BCLR 7
(0101) timer1_init();
020B DEED RCALL _timer1_init
(0102)
(0103) MCUCR = 0x00;
020C 2422 CLR R2
020D BE25 OUT 0x35,R2
(0104) GICR = 0x00;
020E BE2B OUT 0x3B,R2
(0105) TIMSK = 0x04; //timer interrupt sources
020F E084 LDI R24,4
0210 BF89 OUT 0x39,R24
(0106) SEI(); //re-enable interrupts
0211 9478 BSET 7
(0107) //all peripherals are now initialized
(0108) LCD_set_xy(3,0);
0212 2722 CLR R18
0213 E003 LDI R16,3
0214 DEBC RCALL _LCD_set_xy
(0109)
(0110) LCD_set_xy(6,0);
0215 2722 CLR R18
0216 E006 LDI R16,6
0217 DEB9 RCALL _LCD_set_xy
(0111) LCD_write_char(0,':');
0218 E32A LDI R18,0x3A
0219 E030 LDI R19,0
021A 2700 CLR R16
021B 2711 CLR R17
021C DE4D RCALL _LCD_write_char
(0112)
(0113) while(1)
021D CFFF RJMP 0x021D
021E 9508 RET
FILE: D:\test6\delay.c
(0001) /*-----------------------------------------------------------------------
(0002) 延时函数
(0003) 系统时钟：8M
(0004) -----------------------------------------------------------------------*/
(0005) void delay_1us(void) //1us延时函数
(0006) {
(0007) asm("nop");
_delay_1us:
021F 0000 NOP
0220 9508 RET
_delay_nus:
i --> R20
n --> R22
0221 D047 RCALL push_gset2
0222 01B8 MOVW R22,R16
(0008) }
(0009)
(0010) void delay_nus(unsigned int n) //N us延时函数
(0011) {
(0012) unsigned int i=0;
0223 2744 CLR R20
0224 2755 CLR R21
(0013) for (i=0;i<n;i++)
0225 C003 RJMP 0x0229
(0014) delay_1us();
0226 DFF8 RCALL _delay_1us
0227 5F4F SUBI R20,0xFF
0228 4F5F SBCI R21,0xFF
0229 1746 CP R20,R22
022A 0757 CPC R21,R23
022B F3D0 BCS 0x0226
022C D030 RCALL pop_gset2
022D 9508 RET
(0015) }
(0016)
(0017) void delay_1ms(void) //1ms延时函数
(0018) {
(0019) unsigned int i;
(0020) for (i=0;i<1140;i++);
_delay_1ms:
i --> R16
022E 2700 CLR R16
022F 2711 CLR R17
0230 C002 RJMP 0x0233
0231 5F0F SUBI R16,0xFF
0232 4F1F SBCI R17,0xFF
0233 3704 CPI R16,0x74
0234 E0E4 LDI R30,4
0235 071E CPC R17,R30
0236 F3D0 BCS 0x0231
0237 9508 RET
_delay_nms:
i --> R20
n --> R22
0238 D030 RCALL push_gset2
0239 01B8 MOVW R22,R16
(0021) }
(0022)
(0023) void delay_nms(unsigned int n) //N ms延时函数
(0024) {
(0025) unsigned int i=0;
023A 2744 CLR R20
023B 2755 CLR R21
(0026) for (i=0;i<n;i++)
023C C003 RJMP 0x0240
(0027) delay_1ms();
FILE: <library>
023D DFF0 RCALL _delay_1ms
023E 5F4F SUBI R20,0xFF
023F 4F5F SBCI R21,0xFF
0240 1746 CP R20,R22
0241 0757 CPC R21,R23
0242 F3D0 BCS 0x023D
0243 D019 RCALL pop_gset2
0244 9508 RET
mod8u:
0245 9468 BSET 6
0246 C001 RJMP xdiv8u
div8u:
0247 94E8 BCLR 6
xdiv8u:
0248 932A ST R18,-Y
0249 92FA ST R15,-Y
024A 92EA ST R14,-Y
024B 24FF CLR R15
024C 24EE CLR R14
024D E120 LDI R18,0x10
024E 0F00 LSL R16
024F 1CFF ROL R15
0250 1CEE ROL R14
0251 16E1 CP R14,R17
0252 F010 BCS 0x0255
0253 1AE1 SUB R14,R17
0254 9503 INC R16
0255 952A DEC R18
0256 F7B9 BNE 0x024E
0257 F40E BRTC 0x0259
0258 2D0E MOV R16,R14
0259 90E9 LD R14,Y+
025A 90F9 LD R15,Y+
025B 9129 LD R18,Y+
025C 9508 RET
pop_gset2:
025D E0E2 LDI R30,2
025E C010 RJMP pop
pop_gset3:
025F E0E4 LDI R30,4
0260 C00E RJMP pop
pop_gset4:
0261 E0E8 LDI R30,0x8
0262 C00C RJMP pop
push_gset5:
0263 92FA ST R15,-Y
0264 92EA ST R14,-Y
push_gset4:
0265 92DA ST R13,-Y
0266 92CA ST R12,-Y
push_gset3:
0267 92BA ST R11,-Y
0268 92AA ST R10,-Y
push_gset2:
0269 937A ST R23,-Y
026A 936A ST R22,-Y
push_gset1:
026B 935A ST R21,-Y
026C 934A ST R20,-Y
026D 9508 RET
pop_gset1:
026E E0E1 LDI R30,1
pop:
026F 9149 LD R20,Y+
0270 9159 LD R21,Y+
0271 FDE0 SBRC R30,0
0272 9508 RET
0273 9169 LD R22,Y+
0274 9179 LD R23,Y+
0275 FDE1 SBRC R30,1
0276 9508 RET
0277 90A9 LD R10,Y+
0278 90B9 LD R11,Y+
0279 FDE2 SBRC R30,2
027A 9508 RET
027B 90C9 LD R12,Y+
027C 90D9 LD R13,Y+
027D FDE3 SBRC R30,3
027E 9508 RET
027F 90E9 LD R14,Y+
0280 90F9 LD R15,Y+
0281 9508 RET
push_lset:
0282 93FA ST R31,-Y
0283 93EA ST R30,-Y
0284 93BA ST R27,-Y
0285 93AA ST R26,-Y
0286 939A ST R25,-Y
0287 938A ST R24,-Y
0288 933A ST R19,-Y
0289 932A ST R18,-Y
028A 931A ST R17,-Y
028B 930A ST R16,-Y
028C 929A ST R9,-Y
028D 928A ST R8,-Y
028E 927A ST R7,-Y
028F 926A ST R6,-Y
0290 925A ST R5,-Y
0291 924A ST R4,-Y
0292 923A ST R3,-Y
0293 922A ST R2,-Y
0294 921A ST R1,-Y
0295 920A ST R0,-Y
0296 B60F IN R0,0x3F
0297 920A ST R0,-Y
0298 9508 RET
pop_lset:
0299 9009 LD R0,Y+
029A BE0F OUT 0x3F,R0
029B 9009 LD R0,Y+
029C 9019 LD R1,Y+
029D 9029 LD R2,Y+
029E 9039 LD R3,Y+
029F 9049 LD R4,Y+
02A0 9059 LD R5,Y+
02A1 9069 LD R6,Y+
02A2 9079 LD R7,Y+
02A3 9089 LD R8,Y+
02A4 9099 LD R9,Y+
02A5 9109 LD R16,Y+
02A6 9119 LD R17,Y+
02A7 9129 LD R18,Y+
02A8 9139 LD R19,Y+
02A9 9189 LD R24,Y+
02AA 9199 LD R25,Y+
02AB 91A9 LD R26,Y+
02AC 91B9 LD R27,Y+
02AD 91E9 LD R30,Y+
02AE 91F9 LD R31,Y+
02AF 9508 RET
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