📄 fw.lst
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C51 COMPILER V7.02a FW 12/02/2005 17:56:10 PAGE 1
C51 COMPILER V7.02a, COMPILATION OF MODULE FW
OBJECT MODULE PLACED IN fw.OBJ
COMPILER INVOKED BY: c:\Keil\C51\BIN\C51.EXE fw.c BROWSE DEBUG OBJECTEXTEND
stmt level source
1 //-----------------------------------------------------------------------------
2 // File: fw.c
3 // Contents: Firmware frameworks task dispatcher and device request parser
4 // source.
5 //
6 // indent 3. NO TABS!
7 //
8 // $Revision: 18 $
9 // $Date: 12/04/01 5:33p $
10 //
11 // Copyright (c) 1997 AnchorChips, Inc. All rights reserved
12 //-----------------------------------------------------------------------------
13 #include "fx2.h"
14 #include "fx2regs.h"
15
16 //-----------------------------------------------------------------------------
17 // Constants
18 //-----------------------------------------------------------------------------
19 #define DELAY_COUNT 0x9248*8L // Delay for 8 sec at 24Mhz, 4 sec at 48
20 #define _IFREQ 48000 // IFCLK constant for Synchronization Delay
21 #define _CFREQ 48000 // CLKOUT constant for Synchronization Delay
22
23
24
25
26 #define BTN_ADDR 0x20
27 #define LED_ADDR 0x21
28
29 //-----------------------------------------------------------------------------
30 // Random Macros
31 //-----------------------------------------------------------------------------
32 #define min(a,b) (((a)<(b))?(a):(b))
33 #define max(a,b) (((a)>(b))?(a):(b))
34
35 // Registers which require a synchronization delay, see section 15.14
36 // FIFORESET FIFOPINPOLAR
37 // INPKTEND OUTPKTEND
38 // EPxBCH:L REVCTL
39 // GPIFTCB3 GPIFTCB2
40 // GPIFTCB1 GPIFTCB0
41 // EPxFIFOPFH:L EPxAUTOINLENH:L
42 // EPxFIFOCFG EPxGPIFFLGSEL
43 // PINFLAGSxx EPxFIFOIRQ
44 // EPxFIFOIE GPIFIRQ
45 // GPIFIE GPIFADRH:L
46 // UDMACRCH:L EPxGPIFTRIG
47 // GPIFTRIG
48
49 // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
50 // ...these have been replaced by GPIFTC[B3:B0] registers
51
52 #include "fx2sdly.h" // Define _IFREQ and _CFREQ above this #include
53
54 //-----------------------------------------------------------------------------
55 // Global Variables
C51 COMPILER V7.02a FW 12/02/2005 17:56:10 PAGE 2
56 //-----------------------------------------------------------------------------
57 volatile BOOL GotSUD;
58 BOOL Rwuen;
59 BOOL Selfpwr;
60 volatile BOOL Sleep; // Sleep mode enable flag
61
62 WORD pDeviceDscr; // Pointer to Device Descriptor; Descriptors may be moved
63 WORD pDeviceQualDscr;
64 WORD pHighSpeedConfigDscr;
65 WORD pFullSpeedConfigDscr;
66 WORD pConfigDscr;
67 WORD pOtherConfigDscr;
68 WORD pStringDscr;
69
70 //-----------------------------------------------------------------------------
71 // Prototypes
72 //-----------------------------------------------------------------------------
73 void SetupCommand(void);
74 void TD_Init(void);
75 void TD_Poll(void);
76 BOOL TD_Suspend(void);
77 BOOL TD_Resume(void);
78
79 BOOL DR_GetDescriptor(void);
80 BOOL DR_SetConfiguration(void);
81 BOOL DR_GetConfiguration(void);
82 BOOL DR_SetInterface(void);
83 BOOL DR_GetInterface(void);
84 BOOL DR_GetStatus(void);
85 BOOL DR_ClearFeature(void);
86 BOOL DR_SetFeature(void);
87 BOOL DR_VendorCmnd(void);
88
89 // this table is used by the epcs macro
90 const char code EPCS_Offset_Lookup_Table[] =
91 {
92 0, // EP1OUT
93 1, // EP1IN
94 2, // EP2OUT
95 2, // EP2IN
96 3, // EP4OUT
97 3, // EP4IN
98 4, // EP6OUT
99 4, // EP6IN
100 5, // EP8OUT
101 5, // EP8IN
102 };
103
104 // macro for generating the address of an endpoint's control and status register (EPnCS)
105 #define epcs(EP) (EPCS_Offset_Lookup_Table[(EP & 0x7E) | (EP > 128)] + 0xE6A1)
106
107 //-----------------------------------------------------------------------------
108 // Code
109 //-----------------------------------------------------------------------------
110
111 // Task dispatcher
112 BYTE xdata Digit[] = { 0xc0, 0xf9, 0xa4, 0xb0, 0x99, 0x92, 0x82, 0xf8, 0x80, 0x98, 0x88, 0x83, 0xc6, 0xa1,
- 0x86, 0x8e };
113
114 void main(void)
115 {
116 1 DWORD i;
C51 COMPILER V7.02a FW 12/02/2005 17:56:10 PAGE 3
117 1 WORD offset;
118 1 DWORD DevDescrLen;
119 1 DWORD j=0;
120 1 WORD IntDescrAddr;
121 1 WORD ExtDescrAddr;
122 1
123 1 EZUSB_InitI2C(); // Initialize EZ-USB I2C controller
124 1
125 1
126 1 // Initialize Global States
127 1 Sleep = FALSE; // Disable sleep mode
128 1 Rwuen = FALSE; // Disable remote wakeup
129 1 Selfpwr = FALSE; // Disable self powered
130 1 GotSUD = FALSE; // Clear "Got setup data" flag
131 1
132 1 // Initialize user device
133 1 TD_Init();
134 1
135 1
136 1 // The following section of code is used to relocate the descriptor table.
137 1 // Since the SUDPTRH and SUDPTRL are assigned the address of the descriptor
138 1 // table, the descriptor table must be located in on-part memory.
139 1 // The 4K demo tools locate all code sections in external memory.
140 1 // The descriptor table is relocated by the frameworks ONLY if it is found
141 1 // to be located in external memory.
142 1 pDeviceDscr = (WORD)&DeviceDscr;
143 1 pDeviceQualDscr = (WORD)&DeviceQualDscr;
144 1 pHighSpeedConfigDscr = (WORD)&HighSpeedConfigDscr;
145 1 pFullSpeedConfigDscr = (WORD)&FullSpeedConfigDscr;
146 1 pStringDscr = (WORD)&StringDscr;
147 1
148 1 if ((WORD)&DeviceDscr & 0xe000)
149 1 {
150 2 IntDescrAddr = INTERNAL_DSCR_ADDR;
151 2 ExtDescrAddr = (WORD)&DeviceDscr;
152 2 DevDescrLen = (WORD)&UserDscr - (WORD)&DeviceDscr + 2;
153 2 for (i = 0; i < DevDescrLen; i++)
154 2 *((BYTE xdata *)IntDescrAddr+i) = 0xCD;
155 2 for (i = 0; i < DevDescrLen; i++)
156 2 *((BYTE xdata *)IntDescrAddr+i) = *((BYTE xdata *)ExtDescrAddr+i);
157 2 pDeviceDscr = IntDescrAddr;
158 2 offset = (WORD)&DeviceDscr - INTERNAL_DSCR_ADDR;
159 2 pDeviceQualDscr -= offset;
160 2 pConfigDscr -= offset;
161 2 pOtherConfigDscr -= offset;
162 2 pHighSpeedConfigDscr -= offset;
163 2 pFullSpeedConfigDscr -= offset;
164 2 pStringDscr -= offset;
165 2 }
166 1
167 1 EZUSB_IRQ_ENABLE(); // Enable USB interrupt (INT2)
168 1 EZUSB_ENABLE_RSMIRQ(); // Wake-up interrupt
169 1
170 1 INTSETUP |= (bmAV2EN | bmAV4EN); // Enable INT 2 & 4 autovectoring
171 1
172 1 USBIE |= bmSUDAV | bmSUTOK | bmSUSP | bmURES | bmHSGRANT; // Enable selected interrupts
173 1 EA = 1; // Enable 8051 interrupts
174 1
175 1 #ifndef NO_RENUM
176 1 // Renumerate if necessary. Do this by checking the renum bit. If it
177 1 // is already set, there is no need to renumerate. The renum bit will
178 1 // already be set if this firmware was loaded from an eeprom.
C51 COMPILER V7.02a FW 12/02/2005 17:56:10 PAGE 4
179 1 if(!(USBCS & bmRENUM))
180 1 {
181 2 EZUSB_Discon(TRUE); // renumerate
182 2 }
183 1 #endif
184 1
185 1 // unconditionally re-connect. If we loaded from eeprom we are
186 1 // disconnected and need to connect. If we just renumerated this
187 1 // is not necessary but doesn't hurt anything
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