📄 eof.c
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* 240204 JT Created
*
************************************************************************************/
#ifndef I_AM_A_SNIFFER
void DoFastRxEof(void)
{
MC1319xDrv_RxLnaDisable();
if(MC1319xDrv_IsCrcOk()){
if (gBeaconWithBadSrcDetected) {
gBeaconWithBadSrcDetected = FALSE;
if (gpPhyRxData->rxData[gpPhyRxData->headerLength + 1] & 0x40) { // chech PAN coordinator bit in beacon superframe spec. (bit 14)
#if gSchedulerIntegration_d
TS_SendEvent(gMacTaskID_c, gMacEventPanIdConflict_c);
#else // gSchedulerIntegration_d
gPanIdConflict= TRUE;
#endif // gSchedulerIntegration_d
IrqControlLib_EnableAllIrqs();
DoFastRxEofCrcInvalid();
return;
}
}
if (mpfPendingSetup) {
SetupPendingProtected(); // disables and enables all interrupts
}
else{
CODE_PROFILING_SETPIN_0;
IrqControlLib_EnableAllIrqs();
mPhyTxRxState = cIdle;
if(IsCurrentActionAutoRx()){
// Fall back to Rx if in Auto Rx mode
mpfPendingSetup = SetupImmediateRx;
SetupPendingProtected(); // disables and enables all interrupts
}
}
DoFastRxEofCrcValid();
}
else{
IrqControlLib_EnableAllIrqs();
DoFastRxEofCrcInvalid();
}
}
#else
void DoFastRxEof(void)
{
if(MC1319xDrv_IsCrcOk()){
gpPhyRxData->timeStampMCU |= 0x80; // Set bit7 in this element if CRC is ok
}
else {
gpPhyRxData->timeStampMCU &= ~0x80; // Clear bit7 in this element if CRC failed
}
IrqControlLib_EnableAllIrqs();
DoFastRxEofCrcInvalid();
}
#endif I_AM_A_SNIFFER
#if USE_INTERRUPT_RXEOF
/************************************************************************************
* Tail function when using Eof interrupt
* Polls for packet completion and initialises super-fast action to occur at first
* coming interrupt (assumed eof interrupt).
*
* Interface assumptions:
*
* Return value:
* NONE
*
* Revision history:
*
* Date Author Comments
* ------ ------ --------
* 240204 JT Created
*
************************************************************************************/
void PollForRx(void)
{
EXIT_IF_RXINDEX_NOT_REACHED((uint8_t)(gpPhyRxData->frameLength-2));
gIsrAsyncTailFunction = DummyFastIsr;
gIsrFastAction=DoFastRxEof;
}
#else /* USE_INTERRUPT_RXEOF */
/************************************************************************************
* Tail polling function when NOT using Eof interrupt
* Polls for packet completion using GPIO and sets up pending actions
*
* Interface assumptions:
*
* Return value:
* NONE
*
* Revision history:
*
* Date Author Comments
* ------ ------ --------
* 240204 JT Created
*
************************************************************************************/
void PollForRx(void)
{
EXIT_IF_RXINDEX_NOT_REACHED((uint8_t)(gpPhyRxData->frameLength-2));
POLL_UNTIL_IDLE;
MC1319xDrv_RxLnaDisable();
IrqControlLib_DisableAllIrqs(); // ensure nothing influences the delay after polling is done
// Short delay (5 us) inserted to ensure Abel Sequencer stable writing Abel Ctrl register. Prevents GPIO1 held low through Tx.
DELAY_5US // Empty Macro if using TxEOF irq
DoFastRxEof(); // Enables all interrupts inside
}
#endif /* USE_INTERRUPT_RXEOF */
#if !USE_INTERRUPT_TXEOF
/************************************************************************************
* Tail polling function when NOT using Eof interrupt
* Polls for packet completion using GPIO and sets up pending actions
*
* Interface assumptions:
*
* Return value:
* NONE
*
* Revision history:
*
* Date Author Comments
* ------ ------ --------
* 240204 JT Created
*
************************************************************************************/
void PollForTx(void)
{
gIsrAsyncTailFunction = DummyFastIsr;
POLL_UNTIL_IDLE;
DoFastTxEof();
}
#endif /* USE_INTERRUPT_TXEOF */
/************************************************************************************
* Helper function for aborting Phy action upon timeout
*
* Interface assumptions:
*
* Return value:
* NONE
*
* Revision history:
*
* Date Author Comments
* ------ ------ --------
* 190205 JT Created
*
************************************************************************************/
#ifndef ALLOW_TX_ABORT_ON_TIMEOUT
void PhyAbortAndSendTimeoutInd(void){
PhyPlmeForceTrxOffRequest();
PhyPlmeRxTimeoutIndication();
}
#endif // ALLOW_TX_ABORT_ON_TIMEOUT
/************************************************************************************
* If Timeout occurs, generate event to MAC layer
*
* Interface assumptions:
*
* Return value:
* NONE
*
* Revision history:
*
* Date Author Comments
* ------ ------ --------
* 061003 TOJ Created
*
************************************************************************************/
void RxTimeout(void)
{
MC1319xDrv_RxLnaDisable();
CODE_PROFILING_SETPIN_0;
// We have received a timeout on a phy (Rx) action. On TMR4 (timeout) received, the PHY is forced idle
#ifndef ALLOW_TX_ABORT_ON_TIMEOUT
if (mPhyTxRxState == cBusy_Tx) {
gIsrFastAction = PhyAbortAndSendTimeoutInd; // HACK: Timeout in TxAck must only abort Tx synchronously
}
else{
PhyAbortAndSendTimeoutInd();
}
#else //ALLOW_TX_ABORT_ON_TIMEOUT
PhyPlmeForceTrxOffRequest();
PhyPlmeRxTimeoutIndication();
#endif //ALLOW_TX_ABORT_ON_TIMEOUT
}
/************************************************************************************
* If TMR2 expires, then it is a TC2' interrupt. If exiting doze mode, the TC2
* timer interrupt is also used, but the vector must point to ExitDoze.
*
* Sanity check: If TC2' occurs, and no action has been setup, then it is assumed that
* we are out of sync.
*
* Interface assumptions:
*
* Return value:
* NONE
*
* Revision history:
*
* Date Author Comments
* ------ ------ --------
* 061003 TOJ Created
*
************************************************************************************/
void IsrTx2prime(void)
{
CODE_PROFILING_CLRPIN_0
// If gIsrPendingFastAction is NULL, TC2' expired, before new command was programmed
if (NULL==gIsrPendingFastAction){
PhyPlmeSyncLossIndication();
return;
}
gIsrFastAction=gIsrPendingFastAction;
gIsrPendingFastAction=NULL; // Clear pending setup
PhyPlmeB2BIndication(); // Indicate that new TC2' is ready for setup
if (gIsrFastAction==IrqStreamingRxFirst)
InitRxPointers();
}
/************************************************************************************
*************************************************************************************
* Module debug stuff
*************************************************************************************
************************************************************************************/
/************************************************************************************
*************************************************************************************
* Level 1 block comment
*************************************************************************************
************************************************************************************/
//-----------------------------------------------------------------------------------
//-----------------------------------------------------------------------------------
// Level 2 block comment
//-----------------------------------------------------------------------------------
//-----------------------------------------------------------------------------------
/* Level 3 block comment */
// Delimiters
/***********************************************************************************/
//-----------------------------------------------------------------------------------
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