buf2410.hif

smdk2410 cpld code s3c2410 demo board cpld code

HIF003
--
-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
--
-- Warning: do not edit this file!
--
FILES
{
	lpm_add_sub.tdf
	{
		lpm_add_sub [USE_LPM_FOR_AHDL_OPERATORS,LPM_WIDTH,LPM_REPRESENTATION=SIGNED,LPM_DIRECTION=DEFAULT,ONE_INPUT_IS_CONSTANT=NO,LPM_PIPELINE=0,MAXIMIZE_SPEED=5,OPTIMIZE_FOR_SPEED=5,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY,STYLE] [aglobal.inc,altshift.inc,bypassff.inc,look_add.inc,addcore.inc,lpm_add_sub.inc]
		{
			5 [USE_LPM_FOR_AHDL_OPERATORS=OFF,LPM_WIDTH=4,LPM_REPRESENTATION=UNSIGNED,LPM_DIRECTION=SUB,ONE_INPUT_IS_CONSTANT=YES,LPM_PIPELINE=0,MAXIMIZE_SPEED=5,OPTIMIZE_FOR_SPEED=5,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=0,DEVICE_FAMILY=MAX7000AE,STYLE=NORMAL] [DATAA3,DATAA2,DATAA1,DATAA0,DATAB3,DATAB2,DATAB1,DATAB0,RESULT0,RESULT1,RESULT2,RESULT3,COUT];
		}
	}
	addcore.tdf
	{
		addcore [USE_LPM_FOR_AHDL_OPERATORS,width,CONSTANT_CIN,CARRY_CHAIN,CARRY_CHAIN_LENGTH,DEVICE_FAMILY] [aglobal.inc,addcore.inc]
		{
			6 [USE_LPM_FOR_AHDL_OPERATORS=OFF,width=4,CONSTANT_CIN=1,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=0,DEVICE_FAMILY=MAX7000AE] [cin,datab0,datab1,datab2,datab3,dataa0,dataa1,dataa2,dataa3,cout,result0,result1,result2,result3];
			7 [USE_LPM_FOR_AHDL_OPERATORS=OFF,width=8,CONSTANT_CIN=1,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=0,DEVICE_FAMILY=MAX7000AE] [cin,datab0,datab1,datab2,datab3,dataa0,dataa1,dataa2,dataa3,result0,result1,result2,result3,result4];
		}
	}
	altshift.tdf
	{
		altshift [USE_LPM_FOR_AHDL_OPERATORS,WIDTH=4,DEPTH=0] []
		{
			8 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=4,DEPTH=0] [data0,data1,data2,data3,result0,result1,result2,result3];
			9 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=1,DEPTH=0] [data0,result0];
		}
	}
	buf2410.v
	{
		buf2410 [W6=6,W5=5,W4=4,W3=3,W2=2,W1=1,W0=0,ERR=9,DM0=8,FL0=7,WH0=6,HS4=5,HS3=4,HS2=3,HS1=2,HS0=1,READY=0,WHOLE=2,HS16=1] []
		{
			0 [W6=6,W5=5,W4=4,W3=3,W2=2,W1=1,W0=0,ERR=9,DM0=8,FL0=7,WH0=6,HS4=5,HS3=4,HS2=3,HS1=2,HS0=1,READY=0,WHOLE=2,HS16=1] [];
		}
		BUFCTRL [] []
		{
			1 [] [];
		}
		BUFDIR [] []
		{
			2 [] [];
		}
		DMATEST [] []
		{
			3 [] [];
		}
		WAITTEST [] []
		{
			4 [] [];
		}
	}
}
TREE
{
	buf2410::(0,0):(0): buf2410.v
	{
		bufctrl:1:(47,0):(48,b0): buf2410.v;
		bufdir:2:(48,0):(49,b1): buf2410.v;
		dmatest:3:(43,0):(50,m0): buf2410.v
		{
			lpm_add_sub:5:(100,0):(308): lpm_add_sub.tdf
			{
				addcore:6:(212,4):(46,adder): addcore.tdf
				{
					addcore:7:(178,10):(43,adder0): addcore.tdf;
				}
				altshift:8:(222,2):(65,result_ext_latency_ffs): altshift.tdf;
				altshift:9:(224,2):(79,carry_ext_latency_ffs): altshift.tdf;
				altshift:9:(226,2):(87,oflow_ext_latency_ffs): altshift.tdf;
			}
		}
		waittest:4:(44,0):(51,w0): buf2410.v
		{
			lpm_add_sub:5:(203,0):(249): lpm_add_sub.tdf
			{
				addcore:6:(212,4):(46,adder): addcore.tdf
				{
					addcore:7:(178,10):(43,adder0): addcore.tdf;
				}
				altshift:8:(222,2):(65,result_ext_latency_ffs): altshift.tdf;
				altshift:9:(224,2):(79,carry_ext_latency_ffs): altshift.tdf;
				altshift:9:(226,2):(87,oflow_ext_latency_ffs): altshift.tdf;
			}
		}
	}
}