📄 link2.c
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if (txData.packetSentFlag) {
txData.packetSentFlag = FALSE;
intToAscii(++txData.packetsSent);
ebLcdUpdate("Sent:", asciiString);
if (txData.packetsSent < menuData.numberOfPackets)
state = TX_START;
else {
txData.packetsSent = 0;
state = SETUP;
}
}
break;
//----------------------------------------------------------------------------------------
case RX_START:
//----------------------------------------------------------------------------------------
halSpiStrobe(CCxxx0_SRX);
state = RX_WAIT;
//----------------------------------------------------------------------------------------
case RX_WAIT:
//----------------------------------------------------------------------------------------
if (rxData.packetReceivedFlag) {
rxData.packetReceivedFlag = FALSE;
rxData.pBufferIndex = rxBuffer;
if (rxData.crcOK) {
intToAscii(++rxData.packetsReceived);
ebLcdUpdate("Received:", asciiString);
}
state = RX_START;
// Enable external interrupt 1 in case the packet length is greater than 61 bytes.
// Configure external interrupt 0 to give an interrupt on rising edge (sync received)
ENABLE_GLOBAL_INT(INT_OFF);
INT_ENABLE(INUM_EXTERNAL1, INT_ON);
_nop_(); // If this instruction is removed, IE1 might not be cleared
INT_SETFLAG(INUM_EXTERNAL1, INT_CLR);
SETUP_GDO0_INT(EDGE, HIGH);
_nop_(); // If this instruction is removed, IE0 might not be cleared
INT_SETFLAG(INUM_EXTERNAL0, INT_CLR);
ENABLE_GLOBAL_INT(INT_ON);
}
break;
//----------------------------------------------------------------------------------------
default:
//----------------------------------------------------------------------------------------
break;
}
}
}
//-------------------------------------------------------------------------------------------------------
// void EXTERNAL1_ISR(void)
//
// DESCRIPTION:
// This ISR is only enabled when the length byte is 64 or greater in TX or 62 or greater in RX.
// In TX mode there will be an interrupt when the number of bytes in the TX FIFO goes below the threshold
// (less than 5 bytes left in the TX FIFO) and in RX mode there will be an interrupt when there are
// 60 bytes in the RX FIFO.
// For better understanding on how this interrupt work, please see the
// CC1100/CC1150DK & CC2500/CC2550DK Development Kit Examples and Libraries User Manual
//-------------------------------------------------------------------------------------------------------
void EXTERNAL1_ISR(void) interrupt INUM_EXTERNAL1 {
//----------------------- TX MODE -----------------------
if (menuData.radioMode == TX) {
if (txData.writeRemainingDataFlag) { // Less than 60 bytes to write to the TX FIFO
halSpiWriteBurstReg(CCxxx0_TXFIFO, txData.pBufferIndex, txData.bytesLeft);
INT_ENABLE(INUM_EXTERNAL1, INT_OFF);
} else {
halSpiWriteBurstReg(CCxxx0_TXFIFO, txData.pBufferIndex, AVAILABLE_BYTES_IN_TX_FIFO);
txData.pBufferIndex += AVAILABLE_BYTES_IN_TX_FIFO;
txData.bytesLeft -= AVAILABLE_BYTES_IN_TX_FIFO;
if (!(--txData.iterations))
txData.writeRemainingDataFlag = TRUE;
}
//-------------------------------------------------------
//----------------------- RX MODE -----------------------
} else {
// Do not empty the FIFO (See the CC1100 or 2500 Errata Note)
halSpiReadBurstReg(CCxxx0_RXFIFO, rxData.pBufferIndex, (BYTES_IN_RX_FIFO - 1));
rxData.bytesLeft -= (BYTES_IN_RX_FIFO - 1);
rxData.pBufferIndex += (BYTES_IN_RX_FIFO - 1);
}
//-------------------------------------------------------
IE1 = 0; // Clear the interrupt flag in case the interrupt flag were set while in the ISR
}// EXTERNAL_ISR
//-------------------------------------------------------------------------------------------------------
// void EXTERNAL0_ISR(void)
//
// DESCRIPTION:
// In TX mode, this ISR will run when a packet has been sent. In RX mode it will run both when sync
// is received (rising edge) and when the whole packet is received (falling edge).
// For better understanding on how this interrupt work, please see the
// CC1100/CC1150DK & CC2500/CC2550DK Development Kit Examples and Libraries User Manual
//-------------------------------------------------------------------------------------------------------
void EXTERNAL0_ISR(void) interrupt INUM_EXTERNAL0 {
//----------------------- TX MODE -----------------------
if (menuData.radioMode == TX) {
txData.writeRemainingDataFlag = FALSE;
txData.packetSentFlag = TRUE;
//-------------------------------------------------------
//----------------------- RX MODE -----------------------
} else {
if (rxData.syncOrEndOfPacket == SYNC) {
// After the sync word is received one needs to wait some time before there will be any data
// in the FIFO.In addition, the FIFO should not be emptied
// (See the CC1100 or 2500 Errata Note) before the whole packet has been
// received.
halWait(70); // Allow for 2 bytes to be put in the FIFO (2*8*(1/250000)) = 64 us
if (PACKET_INT) { // If this pin has gone low again, one can assume that the lenght byte
// was 0 (nothing was put in the RX FIFO)
rxData.lengthByte = halSpiReadReg(CCxxx0_RXFIFO);
rxData.bytesLeft = rxData.lengthByte + 2;
rxData.pBufferIndex++;
rxData.syncOrEndOfPacket = END_OF_PACKET;
if (rxData.bytesLeft < FIFO_SIZE)
// Disable interrupt on threshold since it is room for the whole packet in the FIFO
INT_ENABLE(INUM_EXTERNAL1, INT_OFF);
SETUP_GDO0_INT(EDGE, LOW); // Enables external interrupt on falling edge (packet received)
_nop_(); // If this instruction is removed, IE0 might not be cleared
INT_SETFLAG(INUM_EXTERNAL0, INT_CLR);
}
} else { // End of Packet
halSpiReadBurstReg(CCxxx0_RXFIFO, rxData.pBufferIndex, rxData.bytesLeft);
rxBuffer[0] = rxData.lengthByte;
rxData.syncOrEndOfPacket = SYNC;
rxData.packetReceivedFlag = TRUE;
rxData.crcOK = ((rxBuffer[rxData.lengthByte + 2]) & CRC_OK);
}
//-------------------------------------------------------
}
}// EXTERNAL_ISR
//-------------------------------------------------------------------------------------------------------
// void intToAscii(UINT16 value)
//
// DESCRIPTION:
// Takes a 16 bits integer as input and converts it to ascii. The result is put in a global
// variable (UINT8 xdata asciiString[6])
//
// ARGUMENTS:
// UINT16 value
// The value to be converted
//-------------------------------------------------------------------------------------------------------
void intToAscii(UINT16 value) {
UINT8 i;
UINT8 j = 0;
UINT8 digit_start = 0;
UINT16 digit = 0;
UINT16 denom = 10000;
if (value == 0) {
asciiString[0] = '0';
asciiString[1] = NULL;
} else {
for(i = 5; i > 0; i--) {
digit = value / denom;
if((digit_start == 1) || (digit != 0)) {
digit_start = 1;
value %= denom;
asciiString[j++] = (digit + '0');
}
denom /= 10;
}
asciiString[j++] = NULL;
}
}// intToAscii
//-------------------------------------------------------------------------------------------------------
// void createDataPacket(void)
//
// DESCRIPTION:
// This function is called before a packet is going to be transmitted.
// Packet format:
//
// |----------------------------------------------------------------------------------------------------
// | | | | | | | |
// | Length field | Address Field | Random Data | Random Data |............| Random Data | Random Data |
// | | | | | | | |
// |----------------------------------------------------------------------------------------------------
// ^ ^ ^ ^
// | | | |
// txBuffer[0] txBuffer[1] txBuffer[2] txBuffer[menuData.packetLength]
//-------------------------------------------------------------------------------------------------------
void createDataPacket(void) {
UINT16 xdata i;
txBuffer[0] = menuData.packetLength;
txBuffer[1] = ADDR;
for (i = 2; i <= menuData.packetLength; i++)
txBuffer[i] = rand();
} //createDataPacket
/******************************************************************************************************
* Revision history: *
*
* $Log: Link2.c,v $
* Revision 1.4 2006/04/25 14:57:58 a0190596
* no message
*
* Revision 1.3 2006/04/11 13:05:10 a0190596
* Added POWER_UP_RESET_CCxxx0();
* Removed iterations from the RX_DATA struct.
* Added packet handling for packets with packet length = 0
*
* Revision 1.2 2006/03/31 13:25:22 a0190596
* Priority of threshold ISR set to high:
* INT_PRIORITY(INUM_EXTERNAL1, INT_HIGH);
* POWER_UP_RESET_CCxxx0() removed
*
* External interrupt 0 and 1 cleared in RX_WAITstate:
* INT_SETFLAG(INUM_EXTERNAL0, INT_CLR);
* INT_SETFLAG(INUM_EXTERNAL1, INT_CLR);
*
* Revision 1.1 2006/03/17 10:40:23 a0190596
* Initial version in CVS
*
*
*
******************************************************************************************************/
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