📄 mmc_def.h
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#define MMC_NCS_MIN 0*WAIT_UNIT
#define MMC_NCS_MAX 1*WAIT_UNIT
#define MMC_NCR_MIN 1*WAIT_UNIT
#define MMC_NCR_MAX 8*WAIT_UNIT
#define MMC_NRC_MIN 1*WAIT_UNIT
#define MMC_NRC_MAX 1*WAIT_UNIT
#define MMC_NAC_MIN 1*WAIT_UNIT
#define MMC_NAC_MAX 16*WAIT_UNIT
#define MMC_NWR_MIN 1*WAIT_UNIT
#define MMC_NWR_MAX 1*WAIT_UNIT
#define MMC_BUSY_WAIT 0xFFFFFFFF/* = 65535(decimal) */
#define MMC_CMD_BITLEN 48 /* BIT LENGTH OF CMD */
#define MMC_CSD_BYTELEN 16 /* CSD BYTE LENGTH */
#define MMC_CSD_BITLEN 128 /* CSD BIT LENGTH */
#define MMC_CID_BITLEN 128 /* CID BIT LENGTH */
#define MMC_CSD_CLOCK (CSD_BYTELEN+CRC16LEN)*8
#define MMC_READ_CLOCK (MMC_BLOCKLEN+CRC16LEN)*8
#define MMC_WRITE_CLOCK MMC_BLOCKLEN*8
#define MMC_CRC_CLOCK CRC16LEN*8
#define MMC_DATARES_CLOCK 4
#define MMC_WAIT_CSDCLOCK NCR_MAX+SPI_RESR2LEN+NAC_MAX+CSD_LEN
#define MMC_WAIT_CIDCLOCK NCR_MAX+SPI_RESR2LEN+NAC_MAX+CID_LEN
/*---------------------Register Define------------------------------------------*/
#define MMCR_BASE 0xFFFE0300
#define MMCR_STR_STP_CLK (MMCR_BASE)
#define MMCR_STATUS (0xFFFE0304)
#define MMCR_CLK_RATE (MMCR_BASE+0x8)
#define MMCR_CMD_DAT_CONT (MMCR_BASE+0x10)
#define MMCR_RES_TO (MMCR_BASE+0x14)
#define MMCR_READ_TO (MMCR_BASE+0x18)
#define MMCR_BLK_LEN (MMCR_BASE+0x1c)
#define MMCR_NOB (MMCR_BASE+0x20)
#define MMCR_REV_NO (MMCR_BASE+0x24)
//#define MMCR_IO_PORT (MMCR_BASE+0x26)
#define MMCR_INT_MASK (MMCR_BASE+0x28)
#define MMCR_CMD (MMCR_BASE+0x2c)
#define MMCR_AGRUMENT (MMCR_BASE+0x30)
#define MMCR_ARGUMENTH (MMCR_BASE+0x30)
#define MMCR_ARGUMENTL (MMCR_BASE+0x32)
#define MMCR_RES_FIFO (MMCR_BASE+0x34)
#define MMCR_BUFFER_ACCESS (MMCR_BASE+0x38)
#define MMCR_BUF_PART_FULL (MMCR_BASE+0x3c)
#define MMCB_R1 0x01
#define MMCB_R2 0x02
#define MMCB_R3 0x03
#define MMCB_R6 0x06
#define MMCB_DATEN 0x08
#define MMCB_WRRD 0x10
#define MMCB_STRBLK 0x20
#define MMCB_BSY 0x40
#define MMCB_INIT 0x80
#define MMCB_BUSW 0x200
#define PORT_PRPUEN 0xfffff462 //pull
#define PORT_PRSEL 0xfffff463 //select
#define IODCR 0xfffff008 // IO drive
/*--------------------Finish wait condition--------------------------------------*/
#define MMC_CMD_DONE 0x04 //deponded on MMCR_INT_MASK
#define MMC_DATA_TRANS_DONE 0x1 //deponded on MMCR_INT_MASK
/*--------------------------------------------------------------------------*/
/* ILLEGAL ERRORS THAT SOFTWARE CHECKS */
/*--------------------------------------------------------------------------*/
#define MMC_CSD_MISS 0x1000/* ABNORMAL CSD */
#define MMC_CID_MISS 0x2000/* ABNORMAL CID */
#define MMC_MBR_ERROR 0x3000/* ABNORMAL MBR DATA */
#define MMC_BPB_ERROR 0x4000/* ABNORMAL BPB DATA */
#define MMC_NO_CARD 0x5000/* CANNOT IDENTIFY CARD */
#define MMC_NOT_EXIST_AREA 0x6000/* ACCESS TO NON-EXIST DOMAIN */
#define MMC_ILLEGAL_STATE 0x7000
#define MMC_ILLEGAL_ERROR_MASK 0xF000
#define MMC_STATUS_NOERROR 0xFDFF0000
#define MMC_READ_TIMEOUT 0x1 //fix
#define MMC_CMD_TIMEOUT 0x2 //fix with MMC status register. CMD error
#define MMC_WRITE_CRC 0x4 //fix
#define MMC_READ_CRC 0x8 //fix
#define MMC_HARDWARE_REV 0x10
#define MMC_CARD_BUSY 0x200 //only use in CMD1
#define MMC_DMA_TRANS_ERR 0x40 //DMA Transfer Error
#define MMC_INVALID_CARD_NO 0x80
#define MMC_DATA_ERR_MASK 0x0400000D
#define MMC_ILLEGAL_COMMAND 0x00400000
#define MMC_STATUS U32
/**********************************************************************************
0 :success
bits
31:16 :card repsonse status(31:16 except bit 25);
1 :Read Time Out according status register
2 :cmd time out according status register
3 :write CRC according status register
4 :read CRC according status register
5 :hardware version error :
9 :card busy only use in cmd1
12:15 :software error see above define
**********************************************************************************/
/*********************************************************************************
MMC Card Response Status (Reponse R1)
Bits Value Description
31 0=No Error The command's argument was out of the allowed range for this
card
--------------------------------------------------------------------------------------
30 0=No Error A misaligned address which didnot match block length was used
in the command
--------------------------------------------------------------------------------------
29 0=No Error The transferred block length is not allowed for this card,or the
number of transferred bytes does not match the block length.
----------------------------------------------------------------------------------------
28 0=No Error An Error in the sequence of erase commands occured.
--------------------------------------------------------------------------------------
27 0=No Error An invalid selection of sectors or groups for erase occurred
-------------------------------------------------------------------------------------
26 0=No Error Attempt to program a write protected block
-------------------------------------------------------------------------------------
25 0=unlock When set,signals that the card is locked by the host
-------------------------------------------------------------------------------------
24 0=No Error Set When a sequence or password error has been detected in
lock/unlock card command or if ther was an atempt to access
a locked card
-------------------------------------------------------------------------------------
23 0=No Error The CRC check of the previous command failed
--------------------------------------------------------------------------------------
22 0=No Error Command not legal for the card state
--------------------------------------------------------------------------------------
21 0=No Error card internal ECC was applied but failed to correct the data.
---------------------------------------------------------------------------------------
20 0=No Error internal card controller error
---------------------------------------------------------------------------------------
19 0=No Error A general or an unknown error occurred during the operation
---------------------------------------------------------------------------------------
18 0=No Error The card could not sustain data transfer in stream read mode
---------------------------------------------------------------------------------------
17 0=No Error The card could not sustain data transfer in stream write mode
---------------------------------------------------------------------------------------
16 0=No Error Can be either one of the following errors:
- The CID register has been already writeen and can not be over
writen
-The read only section of the CSD does not match the card content
-An attempt to reverse the copy(set as original) or permanent WP
(unprotected)bits was made.
----------------------------------------------------------------------------------------
15 0=Not Protected Only partial address space wa erased due to existing write protected
1=Protected Blocks
----------------------------------------------------------------------------------------
14 0=Enabled The command has been executed without using the internal ECC
1=Disabled
----------------------------------------------------------------------------------------
13 0=Cleared An erase sequence was cleared before executing because an out of
1=set erase sequence command was received
----------------------------------------------------------------------------------------
12:9 0=Idle The state of the card when receiving the command. If the command
1=ready executiong cause a state change, it will be visible to the host
2=ident in the response to the next to command.
3=stby The four bits are interpreted as a binary code number between 0 and 15
4=tran
5=data
6=rcv
7=prg
8=dis
9-15 reserved
------------------------------------------------------------------------------------------
8 0=Not Ready corresponds to buffer empty signalling on the bus
------------------------------------------------------------------------------------------
7:6
------------------------------------------------------------------------------------------
5 0=Disabled The card will expect ACMD,or indication that the command has been
1=Enabled interpreted as ACMD.
-----------------------------------------------------------------------------------------
4 reserved
-------------------
3 reserved for application specific commands
---------------------------------------------------
1,0 reserved for manufacturer test mode
**********************************************************************************/
#endif
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