debuginit.txt

FreeScale DragonBall SZ LCD driver samples code

 
 
 
 
 ###### SCR and PWM #####
setmem 0xFFFFF000 0x18, 8 #SCR init Disable Double Map
setmem 0xFFFFFB0B 0x00, 8 #Disable WD
 
 ###### ICE Init #####
setmem 0xFFFFFD0D 0x08, 8 #disable hardmap
setmem 0xFFFFFD0E 0x07, 8 #clear level 7 interrupt
 
 ###### Mask all interrupt #####
setmem 0xFFFFF300 0x40, 8 #IVR
setmem 0xFFFFF304 0xFFFFFFFF, 32 #IMR
 
 ###### GPIO Init #####
setmem 0xFFFFF40B 0x00, 8 
setmem 0xFFFFF413 0x00, 8 
setmem 0xFFFFF41B 0x00, 8 
setmem 0xFFFFF423 0x00, 8 
setmem 0xFFFFF42B 0x00, 8 
setmem 0xFFFFF433 0x00, 8 
setmem 0xFFFFF43B 0x00, 8 
setmem 0xFFFFF443 0x00, 8 
setmem 0xFFFFF44B 0x00, 8 
setmem 0xFFFFF453 0x00, 8 
setmem 0xFFFFF45B 0x00, 8 
setmem 0xFFFFF463 0x00, 8 
 
 #
setmem 0xFFFFF100 0x0400, 16 #Group Base Addr 64M
setmem 0xFFFFF110 0x01AB, 16 #Chip Sel A: Enable Flash, 16 Bits, 4WS, 8M Bytes for each 
 
 #
setmem 0xFFFFF184 0x0500, 16 #Group Base Addr 80M 
setmem 0xFFFFF194 0x0001, 16 
 
 #
setmem 0xFFFFF118 0x0060, 16 #EMUCS, 12ws
setmem 0xFFFFF18A 0x1000, 16 #CSCTRL1, No SRAM config
 
 #Set current driver of some signals to 12mA
setmem 0xFFFFF008 0x9F70, 16 
 
 #
 #
 #
 
 # CSE For SDRAM	
setmem 0xFFFFF180 0x0000, 16 #Group Base Addr 0M 
setmem 0xFFFFF190 0x029D, 16 
 
 # DRAMC Init
setmem 0xFFFFFC10 0x0000, 16 
setmem 0xFFFFFC00 0x9110, 16 
setmem 0xFFFFFC02 0xc254, 16 
 
setmem 0x00100000 0x00, 8 #issue pre charge all and assert A10
 
 # set auto refresh
setmem 0xFFFFFC00 0xA110, 16 
setmem 0x00000000 0x00, 8 # refresh
setmem 0x00000000 0x00, 8 # refresh
setmem 0x00000000 0x00, 8 # refresh
setmem 0x00000000 0x00, 8 # refresh
 
 # set mode register
setmem 0xFFFFFC00 0xB110, 16 
setmem 0x00088800 0x00, 8 
 
 # return to normal mode
setmem 0xFFFFFC00 0x8110, 16 
 
 #
 #
 #
 
 # CSF For SDRAM	
setmem 0xFFFFF182 0x0100, 16 #Group Base Addr 0M 
setmem 0xFFFFF192 0x029D, 16 
 
 # DRAMC Init
setmem 0xFFFFFC10 0x0000, 16 
setmem 0xFFFFFC04 0x9110, 16 
setmem 0xFFFFFC06 0xc254, 16 
 
setmem 0x01100000 0x00, 8 #issue pre charge all and assert A10
 
 # set auto refresh
setmem 0xFFFFFC04 0xA110, 16 
setmem 0x01000000 0x00, 8 # refresh
setmem 0x01000000 0x00, 8 # refresh
setmem 0x01000000 0x00, 8 # refresh
setmem 0x01000000 0x00, 8 # refresh
 
 # set mode register
setmem 0xFFFFFC04 0xB110, 16 
setmem 0x01088800 0x00, 8 
 
 # return to normal mode
setmem 0xFFFFFC04 0x8110, 16