📄 ad_driver.c
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#if 0#endiftypedef unsigned long long u_quad_t;#include <linux/config.h>#include <linux/module.h>#include <linux/kernel.h>#include <linux/init.h>#include <linux/miscdevice.h>#include <linux/sched.h>#include <linux/delay.h>#include <linux/poll.h>#include <linux/spinlock.h>#include <linux/irq.h>#include <linux/delay.h>//#include <asm/hardware.h>#include "LPC2294.h"#define MYMAJOR 240#define Fosc 11059200 #define Fcclk (Fosc * 4) // be equal or less than 60MHz. #define Fcco (Fcclk * 4) //CCO frequence,should be 2¡¢4¡¢8¡¢16 multiples #define Fpclk (Fcclk / 4) * 1 unsigned int adc_data;char str_buf[32];int init_module(void){ adc_init(); return 0;}void cleanup_module(void){ unregister_chrdev(MYMAJOR, "adc_devices"); printk(" unregister_chrdev is OK \n");}int adc_open(struct inode *inode, struct file *file){ PINSEL1 = 0x01400000; ADCR = (1 << 0) | //SEL= 1; ((Fpclk / 1000000 -1) << 6) | //CLKDIV = Fpclk/ 1000 000 -1 (0 << 16) | //BURST = 0; (0 << 17) | //CLKS = 0; (1 << 21) | //FDN =1; (0 << 22) | //TEST1 : 0 = 00 (1 << 24) | //START = 1; (0 << 27); //EDGE = 0; mdelay(10); adc_data = ADDR;}int adc_read(struct file *filp, char *rev_buf, size_t len, loff_t *adc_pos){ ADCR = (ADCR & 0x00FFFF00) | 0x01 | (1 << 24); while((ADDR & 0x80000000) == 0); ADCR = ADCR | (1 << 24); while((ADDR & 0x80000000) == 0); adc_data = ADDR; adc_data = (adc_data >> 6) & 0x3FF; //sprintf(str_buf, "% 4dmv at VIN1", adc_data); copy_to_user(rev_buf, (char *)&adc_data, sizeof(adc_data)); mdelay(10); return sizeof(adc_data);}int adc_release(struct inode *inode, struct file *file){ return 0;}static struct file_operations adc_fops = { owner: THIS_MODULE, open: adc_open, read: adc_read, release: adc_release,};int adc_init(void){ int ret; ret = register_chrdev(MYMAJOR, "adc_devices", &adc_fops); if (ret == 0) { printk(" register_chrdev is OK \n"); } return ret;}
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