tms470r1b1m_het_pwm_01.c

TMS-FET470B1M C Examples

//******************************************************************************
//  TMS470 Demo - HET used to generate PWM
//
//  Program name : tms470r1b1m_HET_PWM_01.c, associated with
//                 HET program tms470r1b1m_HET_PWM_01_H.het
//
//  This programs initializes the HET using the ECMP instruction to
//  generate two PWMs of 25% and 50% duty cycle. The pulses is generated by the
//  HET on HET0 (CC0) and HET1 (CC1) lighting the corresponding LEDs.
//
//  SYSCLK = MCLK = ACLK = 8 x 7.3728MHz = 58.9824MHz
//  ICLK = SYSCLK / 2 = 29.4912MHz
//
//  //*An external 7.3728MHz XTAL with proper load caps is required*//	
//
//              TMS-FET470B1M
//             -----------------
//            |            OSCIN|-
//            |                 | 7.3728MHz
//         +--|PLLDIS     OSCOUT|-
//         |  |                 |
//        -+- |             HET0|---> LED
//            |             HET1|---> LED
//            |                 |
//
//  J.Mangino / A.Dannenberg
//  Texas Instruments, Inc
//  July 29th 2005
//  Built with IAR Embedded Workbench Version: 4.30A
//******************************************************************************

#include <intrinsic.h>
#include "iotms470r1b1m.h"
#include "tms470r1b1m_bit_definitions.h"
#include "std_het.h"
#include "tms470r1b1m_HET_PWM_01_H.h"

__no_init volatile HETPROGRAM0_UN e_HETPROGRAM0_UN @ 0x00800000;

void MemCopy32(unsigned long *dst, unsigned long *src, int bytes)
{
  for (int i = 0; i < (bytes + 3) / 4; i++)
    *dst++ = *src++;
}

void main(void)
{
  PCR = CLKDIV_2;                         // ICLK = SYSCLK / 2
  GCR = ZPLL_CLK_DIV_PRE_1;               // SYSCLK = 8 x fOSC
  PCR |= PENABLE;                         // Enable peripherals

  HETGCR = CLK_MASTER + IGNORE_SUSPEND;   // HET Master Mode, Ignore SW BP

  // Copy HET instructions to HET RAM
  MemCopy32((void *)&e_HETPROGRAM0_UN, (void *)HET_INIT0_PST,
            sizeof(HET_INIT0_PST));

  HETPFR = 0x0000052b;                    // Set PFR register	

  HETDCLR = 0xffffffff;                   // Clear HET output latches
  HETDIR = 0xffffffff;                    // Set HET as GIO outputs

  HETGCR |= ON;                           // Start HET

  __enable_interrupt();                   // Enable Interrupts

  while (1);                              // Loop forever...
}