📄 tms470r1b1m_het_pwm_02.c
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//******************************************************************************
// TMS470 Demo - HET used to generate and synchronously update PWM
//
// Program name : tms470r1b1m_HET_PWM_02.c, associated with
// HET program tms470r1b1m_HET_PWM_02_H.het and cstartup.s79
//
// This programs initializes the HET using the ECMP instruction to
// generate a PWMs and synchronously modify the duty cycle of the PWM.
// The pulses is generated by the HET on HET0 (CC0) lighting the
// corresponding LEDs.
//
// SYSCLK = MCLK = ACLK = 8 x 7.3728MHz = 58.9824MHz
// ICLK = SYSCLK / 4 = 14.7456MHz
//
// //*An external 7.3728MHz XTAL with proper load caps is required*//
//
// TMS-FET470B1M
// -----------------
// | OSCIN|-
// | | 7.3728MHz
// +--|PLLDIS OSCOUT|-
// | | |
// -+- | HET0|---> LED
// | |
//
// J.Mangino
// Texas Instruments, Inc
// October 29th 2005
// Built with IAR Embedded Workbench Version: 4.30A
//******************************************************************************
#include <intrinsic.h>
#include "iotms470r1b1m.h"
#include "tms470r1b1m_bit_definitions.h"
#include "std_het.h"
#include "tms470r1b1m_HET_PWM_02_H.h"
__no_init volatile HETPROGRAM0_UN e_HETPROGRAM0_UN @ 0x00800000;
void MemCopy32(unsigned long *dst, unsigned long *src, int bytes)
{
for (int i = 0; i < (bytes + 3) / 4; i++)
*dst++ = *src++;
}
int data_het_buff [] = {0x10A5,0x0c7b,0x0852,0x0429,0xffff};
int* ip;
void main(void)
{
ip=data_het_buff;
PCR = CLKDIV_2; // ICLK = SYSCLK / 2
GCR = ZPLL_CLK_DIV_PRE_4; // SYSCLK = 8 x fOSC
PCR |= PENABLE; // Enable peripherals
REQMASK = (1 << CIM_HET1); // Enable GIOB and HET1 ints
HETGCR = CLK_MASTER + IGNORE_SUSPEND; // HET Master Mode, Ignore SW BP
// Copy HET instructions to HET RAM
MemCopy32((void *)&e_HETPROGRAM0_UN, (void *)HET_INIT0_PST,
sizeof(HET_INIT0_PST));
HETPFR = 0x0000052b; // Set PFR register
HETPRY = 0x04; // Instruction 0 interrupt
// is high priority
HETDCLR = 0xffffffff; // Clear HET output latches
HETDIR = 0xffffffff; // Set HET as GIO outputs
HETGCR |= ON; // Start HET
__enable_interrupt(); // Enable Interrupts
while (1); // Loop forever...
}
//------------------------------------------------------------------------------
// This ISR is called from the HET and is used to feed
// the HET PWM output by directly writing to the data field of the MOV32
// instruction on every 3rd ISR entry. This functionality could be moved
// into the HET program for CPU load reduction.
//------------------------------------------------------------------------------
void HET1_Instr0_handler()
{
static unsigned int Ctr = 0;
if (++Ctr == 4) Ctr = 0; // Count 0, 1, 2, 0, 1, ...
if (Ctr) return; // Update sample data every
// 3rd ISR entry only
if (*ip != 0xffff)
{
HET_L04_0.memory.data_word = ((0x01ffff10) &(*ip++<<5));
}
else
{
ip = data_het_buff;
HET_L04_0.memory.data_word = ((0x01ffff10) &(*ip++<<5));
}
}
//------------------------------------------------------------------------------
// HET Interrupt Level 1 Handler
//------------------------------------------------------------------------------
void HET1_irq_handler()
{
switch ((HETOFF1 & 0xff) - 1)
{
case 2 : // Int on instruction 0
HET1_Instr0_handler();
break;
}
}
//------------------------------------------------------------------------------
// TMS470R1B1M Standard Interrupt Handler
//------------------------------------------------------------------------------
__irq __arm void irq_handler(void)
{
switch ((IRQIVEC & 0xff) - 1)
{
case CIM_HET1 :
HET1_irq_handler();
break;
}
}
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