📄 tms470r1b1m_het_pcnt_01.c
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//******************************************************************************
// TMS470 Demo - HET used to determine a pulse width
//
// Program name : tms470r1b1m_HET_PCNT_01.c, associated with
// HET program tms470r1b1m_HET_PCNT_01_H.het
//
// Description; Using the PCNT instruction the HET will determine the width
// of a Pulse. The pulse is generated by the HET on HET0 and read into the HET
// on HET1. When the pusle width is valid the HET will trigger an interrupt.
// At this point the data may be viewed. Pins HET0 (CC0) and HET1 (CC1) must be
// connected. You may use the jumpers to connect these two pins together.
// Set a breakpoint on the HETGCR |= ON; instruction in the HET1_Pin0_handler()
// function and open a watch window and put tmp in the expression location.
// You may set the format to HEX so you can see 0x2000 in the value window.
//
// SYSCLK = MCLK = ACLK = 8 x 7.3728MHz = 58.9824MHz
// ICLK = SYSCLK / 2 = 29.4912MHz
//
// //*An external 7.3728MHz XTAL with proper load caps is required*//
//
// TMS-FET470B1M
// -----------------
// | OSCIN|-
// | | 7.3728MHz
// +--|PLLDIS OSCOUT|-
// | | |
// -+- | HET0|---+
// | | |
// | HET1|---+
// | |
//
// J.Mangino / A.Dannenberg
// Texas Instruments, Inc
// July 29th 2005
// Built with IAR Embedded Workbench Version: 4.30A
//******************************************************************************
#include <intrinsic.h>
#include "iotms470r1b1m.h"
#include "tms470r1b1m_bit_definitions.h"
#include "std_het.h"
#include "tms470r1b1m_HET_PCNT_01_H.h"
volatile unsigned int tmp;
__no_init volatile HETPROGRAM0_UN e_HETPROGRAM0_UN @ 0x00800000;
void MemCopy32(unsigned long *dst, unsigned long *src, int bytes)
{
for (int i = 0; i < (bytes + 3) / 4; i++)
*dst++ = *src++;
}
void main(void)
{
PCR = CLKDIV_2; // ICLK = SYSCLK / 2
GCR = ZPLL_CLK_DIV_PRE_1; // SYSCLK = 8 x fOSC
PCR |= PENABLE; // Enable peripherals
REQMASK = (1 << CIM_HET1); // Enable HET Interrupt mask
// Copy HET instructions to HET RAM
MemCopy32((void *)&e_HETPROGRAM0_UN, (void *)HET_INIT0_PST,
sizeof(HET_INIT0_PST));
HETGCR = CLK_MASTER + IGNORE_SUSPEND; // HET Master Mode, Ignore SW BP
HETPRY = 0x08; // Int on instr. 3 is high-priority
HETPFR = 0x0000052b; // Set PFR register
HETDCLR = 0xffffffff; // Clear HET output latches
HETDIR = 0xfffffffe; // Set HET pin directions
__enable_interrupt(); // Enable Interrupts
HETGCR |= ON; // Start HET
while (1); // Loop forever...
}
//------------------------------------------------------------------------------
void HET1_Pin0_handler()
{
HETGCR &= ~ON;
tmp = HET_L03_0.memory.control_word & 0x000FFFFF;
HETGCR |= ON; // Set breakpoint >>HERE<<
} // and read out 'tmp'
//------------------------------------------------------------------------------
void HET1_irq_handler()
{
switch ((0xff & HETOFF1)-1)
{
case 3 :
HET1_Pin0_handler();
break;
}
}
//------------------------------------------------------------------------------
// TMS470R1B1M Standard Interrupt Handler
//------------------------------------------------------------------------------
__irq __arm void irq_handler(void)
{
switch ((0xff & IRQIVEC)-1)
{
case CIM_HET1 :
HET1_irq_handler();
break;
}
}
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