tms470r1b1m_het_int_02.c

TMS-FET470B1M C Examples

//*****************************************************************************
//  TMS470 Demo -  HET Interrupt Sample Program
//
//  Program name : tms470r1b1m_HET_INT_02.c, associated with
//                 HET program tms470r1b1m_HET_INT_02_H.het
//
//  Description; This program uses the HET to trigger the ADC at 10 ms
//  intervals. The result of the ADC is averaged 20 times and then displayed
//  using the LEDs on the EVM.
//
//  SYSCLK = MCLK = ACLK = 8 x 7.3728MHz = 58.9824MHz
//  ICLK = SYSCLK / 3 = 19.6608MHz
//
//  //*An external 7.3728MHz XTAL with proper load caps is required*//	
//
//              TMS-FET470B1M
//             -----------------
//            |            OSCIN|-
//            |                 | 7.3728MHz
//         +--|PLLDIS     OSCOUT|-
//         |  |                 |
//        -+- |          HET0..7|---> 8 HET LEDs
//            |                 |
//        >---|ADIN0            |
//            |                 |
//
//  J.Mangino / A.Dannenberg
//  Texas Instruments, Inc
//  July 29th 2005
//  Built with IAR Embedded Workbench Version: 4.30A
//******************************************************************************

#include <intrinsic.h>
#include "iotms470r1b1m.h"
#include "tms470r1b1m_bit_definitions.h"
#include "std_het.h"
#include "tms470r1b1m_HET_INT_02_H.h"

void MemCopy32(unsigned long *dst, unsigned long *src, int bytes);

__no_init volatile HETPROGRAM0_UN e_HETPROGRAM0_UN @ 0x00800000;

volatile unsigned int result[20];
unsigned int average;

void main(void)
{
  PCR = CLKDIV_3;                               // ICLK = SYSCLK / 3
  GCR = ZPLL_CLK_DIV_PRE_1;                     // SYSCLK = 8 x fOSC
  PCR |= PENABLE;                               // Enable peripherals

  REQMASK = 0;                            // clear interrupt mask
  REQMASK |= (1<<CIM_MIBADCE1);           // enable channel 27 (AD1)

  ADCR1 |= PS_8;                          // ADCLK prescaler = 8
  ADSAMPEV |= SEN;                        // ADCSAMP1 controls SW
  ADSAMP1 = 62;                           // SW = 62+2

  ADCR1 |= ADC_EN;                        // Enable ADC
  ADISR1 = 0x0001;                        // group 1 = channel 0

  ADEVTSRC = G1_SRC_INT1 + G1_EDG_SEL + G1_ENA; // enable group 1 and set trigger for low
                                                // to high transition
  ADBCR1 |= BUF_EN;                       // enable buffered mode
  ADBCR1 |= BNDA_8;                       // set RAM boundary between event and group 1
                                          // units of two words from the beginning of buffer
                                          // event group has 8*2 = 16 words for the FIFO
  ADBCR1 |= BNDB_16 + BNDB_2;             // set RAM boundary between group 1 and 2
                                          // units of two words from the beginning of buffer
                                          // group 1 has (18-8)*2 = 20 words for the FIFO
  ADBCR2 |= BNDEND_64;                    // set RAM buffer end boundary
                                          // 64-word FIFO buffer
                                          // group 2 has 64-(2*18) = 28 words for the FIFO

  ADTHRG1 = G1THR_16 + G1THR_4;           // group 1 threshold counter = 20, 20 results will be
                                          // placed on the buffer before setting G1 BUF INT FLAG

  ADBUFST &= ~G1_INT_FLAG;                // clear flag
  ADBCR3 |= G1_OVR_INT_EN;                // enable group 1 FIFO buffer over-run interrupt
  ADBCR3 |= G1_BUF_INT_EN;                // enable group 1 FIFO buffer interrupt

  HETGCR = CLK_MASTER + IGNORE_SUSPEND;   //  HET Master Mode, Ignore SW BP

  // Copy HET instructions to HET RAM
  MemCopy32((void *)&e_HETPROGRAM0_UN, (void *)HET_INIT0_PST,
            sizeof(HET_INIT0_PST));

  HETPFR  = 0x00000309;                   // Set LR Div = 8, HR Div = 10
  HETDCLR = 0xffffffff;                   // Clear HET output latches
  HETDIR = 0xffffffff;                    // Set HET as GIO outputs
  HETGCR |= ON;                           // Start HET

  __enable_interrupt();                   // enable interrupts

  while (1);                              // Loop forever...
}
//------------------------------------------------------------------------------
// This module programms the HET RAM with the HET code
//------------------------------------------------------------------------------
void MemCopy32(unsigned long *dst, unsigned long *src, int bytes)
{
  for (int i = 0; i < (bytes + 3) / 4; i++)
    *dst++ = *src++;
}
//------------------------------------------------------------------------------
// TMS470R1B1M Standard Interrupt Handler
//------------------------------------------------------------------------------

__irq __arm void irq_handler(void)
{
  switch ((0xff & IRQIVEC)-1)
  {
    case CIM_MIBADCE1  :                      // channel 27 (AD1) interrupt?
      if (ADBUFST & 0x0020)                     // buffer over-run?
      {
        ADISR1 = 0x0001;                      // clear buffer
        ADTHRG1 = G1THR_16 + G1THR_4;         // reset group 1 threshold
      }
      else
      {
        unsigned int i;
        ADBUFST &= ~G1_INT_FLAG;               // clear flag
        average = 0;
        for (i=0; i<20; i++)
        {
          result[i] = ADBUF1;                  // read FIFO value
          average = average + result[i];       // sum values
        }
        average = (unsigned int) average / 20;  // get average
        HETDOUT = average & 0xff;             // Output 8 LSBs to LEDs
      }
      break;
  }
}