📄 fet120_adc10_08.asm
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;******************************************************************************
; MSP-FET430P120 Demo - ADC10, DTC Sample A0 64x, 1.5V, Repeat Single, DCO
;
; Description: Use DTC to sample A0 64 times with reference to internal 1.5v.
; Vref Software writes to ADC10SC to trigger sample burst. In Mainloop MSP430
; waits in LPM0 to save power until ADC10 conversion complete, ADC10_ISR(DTC)
; will force exit from any LPMx in Mainloop on reti. ADC10 internal
; oscillator times sample period (16x) and conversion (13x). DTC transfers
; conversion code to RAM 200h - 280h. P1.0 .set at start of conversion burst,
; reset on completion.
; //* MSP430F1232 or MSP430F1132 Device Required *//
;
; MSP430F1232
; -----------------
; /|\| XIN|-
; | | |
; --|RST XOUT|-
; | |
; >---|A0 P1.0|-->LED
;
; M. Buccini / M. Raju
; Texas Instruments Inc.
; May 2005
; Built with Code Composer Essentials Version: 1.0
;******************************************************************************
.cdecls C,LIST, "msp430x12x2.h"
;------------------------------------------------------------------------------
.text ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #0300h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupADC10 mov.w #CONSEQ_2,&ADC10CTL1 ; Repeat single channel
mov.w #SREF_1+ADC10SHT_2+MSC+REFON+ADC10ON+ADC10IE,&ADC10CTL0;
mov.w #30,&TACCR0 ; Delay to allow Ref to settle
bis.w #CCIE,&TACCTL0 ; Compare-mode interrupt.
mov.w #TACLR+MC_1+TASSEL_2,&TACTL; up mode, SMCLK
bis.w #LPM0+GIE,SR ; Enter LPM0, enable interrupts
bic.w #CCIE,&TACCTL0 ; Disable timer interrupt
dint ; Disable Interrupts
mov.b #040h,&ADC10DTC1 ; 64 conversions
bis.b #01h,&ADC10AE ; P2.0 ADC option select
SetupP1 bis.b #001h,&P1DIR ; P1.0 output
;
Mainloop bic.w #ENC,&ADC10CTL0 ;
busy_test bit #BUSY,&ADC10CTL1 ; ADC10 core inactive?
jnz busy_test ;
mov.w #0200h,&ADC10SA ; Data buffer start
bis.b #001h,&P1OUT ; P1.0 = 1
bis.w #ENC+ADC10SC,&ADC10CTL0 ; Start sampling
bis.w #CPUOFF+GIE,SR ; LPM0, ADC10_ISR will force exit
bic.b #001h,&P1OUT ; P1.0 = 0
jmp Mainloop ; Again
;
;------------------------------------------------------------------------------
TA0_ISR; ISR for CCR0
;------------------------------------------------------------------------------
clr &TACTL ; clear Timer_A control registers
bic #LPM0,0(SP) ; Exit LPMx, interrupts enabled
reti ;
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
ADC10_ISR;
;------------------------------------------------------------------------------
mov.w #GIE,0(SP) ; Exit any LPMx on reti
reti ;
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.sect ".int05" ; ADC10 Vector
.short ADC10_ISR ;
.sect ".int09" ; Timer_A0 Vector
.short TA0_ISR ;
.end
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