switchtest.mdl

内容:simulink 非线性模块仿真正弦信号通过新回环函数

		Cell			"InlinedPrmAccess"
		Cell			"CustomSymbolStr"
		PropName		"DisabledProps"
	      }
	      Version		      "1.1.0"
	      ForceParamTrailComments off
	      GenerateComments	      on
	      IgnoreCustomStorageClasses on
	      IncHierarchyInIds	      off
	      MaxIdLength	      31
	      PreserveName	      off
	      PreserveNameWithParent  off
	      ShowEliminatedStatement off
	      IncAutoGenComments      off
	      SimulinkDataObjDesc     off
	      SFDataObjDesc	      off
	      IncDataTypeInIds	      off
	      PrefixModelToSubsysFcnNames on
	      CustomSymbolStr	      "$R$N$M"
	      MangleLength	      1
	      DefineNamingRule	      "None"
	      ParamNamingRule	      "None"
	      SignalNamingRule	      "None"
	      InsertBlockDesc	      off
	      SimulinkBlockComments   on
	      EnableCustomComments    off
	      InlinedPrmAccess	      "Literals"
	      ReqsInCode	      off
	    }
	    Simulink.GRTTargetCC {
	      $BackupClass	      "Simulink.TargetCC"
	      $ObjectID		      10
	      Array {
		Type			"Cell"
		Dimension		12
		Cell			"IncludeMdlTerminateFcn"
		Cell			"CombineOutputUpdateFcns"
		Cell			"SuppressErrorStatus"
		Cell			"ERTCustomFileBanners"
		Cell			"GenerateSampleERTMain"
		Cell			"MultiInstanceERTCode"
		Cell			"PurelyIntegerCode"
		Cell			"SupportNonFinite"
		Cell			"SupportComplex"
		Cell			"SupportAbsoluteTime"
		Cell			"SupportContinuousTime"
		Cell			"SupportNonInlinedSFcns"
		PropName		"DisabledProps"
	      }
	      Version		      "1.1.0"
	      TargetFcnLib	      "ansi_tfl_tmw.mat"
	      TargetLibSuffix	      ""
	      TargetPreCompLibLocation ""
	      GenFloatMathFcnCalls    "ANSI_C"
	      UtilityFuncGeneration   "Auto"
	      GenerateFullHeader      on
	      GenerateSampleERTMain   off
	      IsPILTarget	      off
	      ModelReferenceCompliant on
	      IncludeMdlTerminateFcn  on
	      CombineOutputUpdateFcns off
	      SuppressErrorStatus     off
	      IncludeFileDelimiter    "Auto"
	      ERTCustomFileBanners    off
	      SupportAbsoluteTime     on
	      LogVarNameModifier      "rt_"
	      MatFileLogging	      on
	      MultiInstanceERTCode    off
	      SupportNonFinite	      on
	      SupportComplex	      on
	      PurelyIntegerCode	      off
	      SupportContinuousTime   on
	      SupportNonInlinedSFcns  on
	      ExtMode		      off
	      ExtModeStaticAlloc      off
	      ExtModeTesting	      off
	      ExtModeStaticAllocSize  1000000
	      ExtModeTransport	      0
	      ExtModeMexFile	      "ext_comm"
	      RTWCAPISignals	      off
	      RTWCAPIParams	      off
	      RTWCAPIStates	      off
	      GenerateASAP2	      off
	    }
	    PropName		    "Components"
	  }
	}
	PropName		"Components"
      }
      Name		      "Configuration"
      SimulationMode	      "normal"
      CurrentDlgPage	      "Solver"
    }
    PropName		    "ConfigurationSets"
  }
  Simulink.ConfigSet {
    $PropName		    "ActiveConfigurationSet"
    $ObjectID		    1
  }
  BlockDefaults {
    Orientation		    "right"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    NamePlacement	    "normal"
    FontName		    "arial"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    ShowName		    on
  }
  BlockParameterDefaults {
    Block {
      BlockType		      Memory
      X0		      "0"
      InheritSampleTime	      off
      LinearizeMemory	      off
      StateMustResolveToSignalObject off
      RTWStateStorageClass    "Auto"
    }
    Block {
      BlockType		      Outport
      Port		      "1"
      UseBusObject	      off
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      OutputWhenDisabled      "held"
      InitialOutput	      "[]"
    }
    Block {
      BlockType		      RelationalOperator
      Operator		      ">="
      InputSameDT	      on
      LogicOutDataTypeMode    "Logical (see Configuration Parameters: Optimiza"
"tion)"
      LogicDataType	      "uint(8)"
      ZeroCross		      on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Saturate
      UpperLimit	      "0.5"
      LowerLimit	      "-0.5"
      LinearizeAsGain	      on
      ZeroCross		      on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Sin
      SineType		      "Time based"
      TimeSource	      "Use simulation time"
      Amplitude		      "1"
      Bias		      "0"
      Frequency		      "1"
      Phase		      "0"
      Samples		      "10"
      Offset		      "0"
      SampleTime	      "-1"
      VectorParams1D	      on
    }
    Block {
      BlockType		      Switch
      Criteria		      "u2 >= Threshold"
      Threshold		      "0"
      InputSameDT	      on
      OutDataTypeMode	      "Inherit via internal rule"
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
      ZeroCross		      on
      SampleTime	      "-1"
    }
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "arial"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  LineDefaults {
    FontName		    "arial"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "switchtest"
    Location		    [326, 165, 906, 466]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "A4"
    PaperUnits		    "centimeters"
    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Memory
      Name		      "Memory"
      Position		      [155, 220, 185, 250]
    }
    Block {
      BlockType		      RelationalOperator
      Name		      "Relational\nOperator"
      Position		      [290, 172, 320, 203]
      InputSameDT	      off
      LogicOutDataTypeMode    "Boolean"
    }
    Block {
      BlockType		      Saturate
      Name		      "Saturation"
      Position		      [195, 100, 225, 130]
    }
    Block {
      BlockType		      Saturate
      Name		      "Saturation1"
      Position		      [175, 30, 205, 60]
    }
    Block {
      BlockType		      Sin
      Name		      "Sine Wave"
      Ports		      [0, 1]
      Position		      [20, 145, 50, 175]
      SineType		      "Time based"
      Amplitude		      "10"
      SampleTime	      "0"
    }
    Block {
      BlockType		      Switch
      Name		      "Switch"
      Position		      [375, 115, 405, 145]
      Threshold		      "0.5"
      InputSameDT	      off
      SaturateOnIntegerOverflow	off
    }
    Block {
      BlockType		      Outport
      Name		      "Out1"
      Position		      [465, 118, 495, 132]
      IconDisplay	      "Port number"
      BusOutputAsStruct	      off
    }
    Block {
      BlockType		      Outport
      Name		      "Out2"
      Position		      [485, 258, 515, 272]
      Port		      "2"
      IconDisplay	      "Port number"
      BusOutputAsStruct	      off
    }
    Line {
      SrcBlock		      "Sine Wave"
      SrcPort		      1
      Points		      [20, 0]
      Branch {
	Points			[10, 0]
	Branch {
	  Points		  [35, 0]
	  Branch {
	    Points		    [35, 0; 0, 15; 120, 0]
	    DstBlock		    "Relational\nOperator"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, -40; 60, 0]
	    DstBlock		    "Saturation"
	    DstPort		    1
	  }
	}
	Branch {
	  Points		  [0, -115]
	  DstBlock		  "Saturation1"
	  DstPort		  1
	}
      }
      Branch {
	Points			[0, 75; 15, 0]
	Branch {
	  DstBlock		  "Memory"
	  DstPort		  1
	}
	Branch {
	  Points		  [0, 30]
	  DstBlock		  "Out2"
	  DstPort		  1
	}
      }
    }
    Line {
      SrcBlock		      "Memory"
      SrcPort		      1
      Points		      [40, 0; 0, -40]
      DstBlock		      "Relational\nOperator"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Relational\nOperator"
      SrcPort		      1
      Points		      [15, 0; 0, -60]
      DstBlock		      "Switch"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Saturation"
      SrcPort		      1
      Points		      [125, 0; 0, 25]
      DstBlock		      "Switch"
      DstPort		      3
    }
    Line {
      SrcBlock		      "Saturation1"
      SrcPort		      1
      Points		      [150, 0]
      DstBlock		      "Switch"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Switch"
      SrcPort		      1
      Points		      [20, 0; 0, -5]
      DstBlock		      "Out1"
      DstPort		      1
    }
  }
}