📄 carelecfinal.mdl
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Location [188, 365, 512, 604]
Open off
NumInputPorts "1"
TickLabels "OneTimeTick"
ZoomMode "xonly"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
}
List {
ListType SelectedSignals
axes1 ""
}
Grid "on"
TimeRange "auto"
YMin "-17.5"
YMax "17.5"
SaveToWorkspace off
SaveName "ScopeData"
DataFormat "StructureWithTime"
LimitDataPoints off
MaxDataPoints "5000"
Decimation "1"
SampleInput off
SampleTime "0"
}
Block {
BlockType Scope
Name "Scope1"
Ports [1]
Position [845, 289, 875, 321]
Floating off
Location [188, 365, 512, 604]
Open off
NumInputPorts "1"
TickLabels "OneTimeTick"
ZoomMode "xonly"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
}
Grid "on"
TimeRange "auto"
YMin "-17.5"
YMax "17.5"
SaveToWorkspace off
SaveName "ScopeData"
DataFormat "StructureWithTime"
LimitDataPoints off
MaxDataPoints "5000"
Decimation "1"
SampleInput off
SampleTime "0"
}
Block {
BlockType Scope
Name "Scope2"
Ports [1]
Position [775, 394, 805, 426]
Floating off
Location [520, 364, 844, 603]
Open on
NumInputPorts "1"
TickLabels "OneTimeTick"
ZoomMode "xonly"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
}
List {
ListType SelectedSignals
axes1 ""
}
Grid "on"
TimeRange "auto"
YMin "9.675"
YMax "10.1"
SaveToWorkspace off
SaveName "ScopeData"
DataFormat "StructureWithTime"
LimitDataPoints off
MaxDataPoints "5000"
Decimation "1"
SampleInput off
SampleTime "0"
}
Block {
BlockType Scope
Name "Scope3"
Ports [1]
Position [845, 214, 875, 246]
Floating off
Location [188, 365, 512, 604]
Open off
NumInputPorts "1"
TickLabels "OneTimeTick"
ZoomMode "xonly"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
}
Grid "on"
TimeRange "auto"
YMin "-17.5"
YMax "17.5"
SaveToWorkspace off
SaveName "ScopeData"
DataFormat "StructureWithTime"
LimitDataPoints off
MaxDataPoints "5000"
Decimation "1"
SampleInput off
SampleTime "0"
}
Block {
BlockType Scope
Name "Scope4"
Ports [1]
Position [450, 389, 480, 421]
Floating off
Location [188, 365, 512, 604]
Open off
NumInputPorts "1"
TickLabels "OneTimeTick"
ZoomMode "xonly"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
}
Grid "on"
TimeRange "auto"
YMin "15"
YMax "16.75"
SaveToWorkspace off
SaveName "ScopeData"
DataFormat "StructureWithTime"
LimitDataPoints off
MaxDataPoints "5000"
Decimation "1"
SampleInput off
SampleTime "0"
}
Block {
BlockType Reference
Name "Simplified Synchronous \nMachine SI Units"
Tag "PoWeRsYsTeMbLoCk"
Ports [2, 4]
Position [710, 27, 780, 98]
SourceBlock "powerlib2/Machines/Simplified Synchronous \nMac"
"hine SI Units"
SourceType "Simplified Synchronous Machine"
conType "3-wire Y"
x1 "[ 750, 20, 60 ]"
x2 "[ inf, 0, 3]"
x3 "[ 0.1, 2.15e-5 ]"
x4 "[ 0 0 0,0,0 0,0,0 ]"
PSBOutputType "1111"
iounits "1"
}
Block {
BlockType Sum
Name "Sum"
Ports [2, 1]
Position [640, 205, 660, 225]
ShowName off
IconShape "round"
Inputs "|+-"
SaturateOnIntegerOverflow on
}
Block {
BlockType Sum
Name "Sum1"
Ports [2, 1]
Position [635, 115, 655, 135]
ShowName off
IconShape "round"
Inputs "|++"
SaturateOnIntegerOverflow on
}
Block {
BlockType Scope
Name "Te"
Ports [1]
Position [545, 237, 565, 263]
Floating off
Location [737, 529, 944, 735]
Open off
NumInputPorts "1"
TickLabels "on"
ZoomMode "xonly"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
}
List {
ListType SelectedSignals
axes1 ""
}
Grid "on"
TimeRange "10"
YMin "-100"
YMax "800"
SaveToWorkspace on
SaveName "Tm"
DataFormat "Array"
LimitDataPoints off
MaxDataPoints "500000"
Decimation "1"
SampleInput off
SampleTime "0"
}
Block {
BlockType Terminator
Name "Terminator"
Position [480, 228, 495, 242]
ShowName off
}
Block {
BlockType SubSystem
Name "Variable resistor\n(with parasitic L) "
Ports [2, 1]
Position [590, 436, 675, 494]
ForegroundColor "blue"
ShowPortLabels on
TreatAsAtomicUnit off
RTWSystemCode "Auto"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
MaskInitialization "[s1,s2,s3,s4,r1,r2,l1,l2,c1,c2,c3,c4,x1,x2,x3,x"
"4] = powericon('Parallel RLC Branch',1,inf,0);"
MaskDisplay "plot(s1-30,s2,s3+30,s4,r1,r2,l1,l2,c1,c2,c3,c4,"
"x1,x2,x3,x4)"
MaskIconFrame on
MaskIconOpaque off
MaskIconRotate "none"
MaskIconUnits "autoscale"
System {
Name "Variable resistor\n(with parasitic L) "
Location [177, 392, 857, 738]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "automatic"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "100"
Block {
BlockType Inport
Name "in"
Position [15, 95, 35, 115]
Port "1"
LatchInput off
Interpolate on
}
Block {
BlockType Inport
Name "R value"
Position [165, 288, 195, 302]
Port "2"
LatchInput off
Interpolate on
Port {
PortNumber 1
Name "R"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
}
Block {
BlockType Gain
Name "1/L"
Position [220, 86, 255, 114]
Gain "1/1e-5"
Multiplication "Element-wise(K.*u)"
SaturateOnIntegerOverflow on
Port {
PortNumber 1
Name "VL"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
}
Block {
BlockType Integrator
Name "Integrator"
Ports [1, 1]
Position [295, 85, 325, 115]
ExternalReset "none"
InitialConditionSource "internal"
InitialCondition "0"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
Port {
PortNumber 1
Name " iR, iL"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
}
Block {
BlockType Product
Name "Product"
Ports [2, 1]
Position [210, 185, 245, 220]
Orientation "left"
NamePlacement "alternate"
Inputs "2"
Multiplication "Element-wise(.*)"
SaturateOnIntegerOverflow on
Port {
PortNumber 1
Name "vR = R * i"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
}
Block {
BlockType Reference
Name "Resistor current"
Tag "PoWeRsYsTeMbLoCk"
Description "source block"
Ports [1, 2]
Position [425, 74, 470, 121]
SourceBlock "powerlib2/Electrical\nSources/Controlled Cu"
"rrent Source"
SourceType "Controlled Current Source"
initsrc on
srctyp "DC"
ia "0"
iph "0"
freq "0"
mesure "None"
PSBOutputType "11"
}
Block {
BlockType Reference
Name "Resistor voltage"
Tag "PoWeRsYsTeMmEaSuReMeNt"
Ports [2, 1]
Position [105, 88, 130, 112]
NamePlacement "alternate"
SourceBlock "powerlib2/Measurements/Voltage Measurement"
SourceType "Voltage Measurement"
PSBOutputType "0"
PSBequivalent "0"
Port {
PortNumber 1
Name "V"
PropagatedSignals "simulink"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
}
}
Block {
BlockType Sum
Name "Sum1"
Ports [2, 1]
Position [170, 90, 190, 110]
ShowName off
IconShape "round"
Inputs "|+-"
SaturateOnIntegerOverflow on
}
Block {
BlockType Reference
Name "T connector1"
Tag "PoWeRsYsTeMbLoCk"
Ports [1, 1, 1]
Position [55, 95, 75, 115]
NamePlacement "alternate"
ShowName off
SourceBlock "powerlib2/Connectors/T connector"
SourceType "Bus Bar"
PSBOutputType "1"
}
Block {
BlockType Gain
Name "feedback"
Position [370, 86, 405, 114]
Gain "-1"
Multiplication "Element-wise(K.*u)"
SaturateOnIntegerOverflow on
}
Block {
BlockType Outport
Name "out"
Position [570, 78, 600, 92]
Port "1"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Line {
SrcBlock "Resistor current"
SrcPort 1
Points [10, 0]
Branch {
DstBlock "out"
DstPort 1
}
Branch {
Points [0, -50; -425, 0; 0, 60]
DstBlock "Resistor voltage"
DstPort 1
}
}
Line {
SrcBlock "in"
SrcPort 1
DstBlock "T connector1"
DstPort 1
}
Line {
SrcBlock "Sum1"
SrcPort 1
DstBlock "1/L"
DstPort 1
}
Line {
SrcBlock "Resistor current"
SrcPort 2
Points [35, 0; 0, 145; -445, 0]
DstBlock "T connector1"
DstPort enable
}
Line {
SrcBlock "T connector1"
SrcPort 1
DstBlock "Resistor voltage"
DstPort 2
}
Line {
Name " iR, iL"
Labels [1, 0]
SrcBlock "Integrator"
SrcPort 1
Points [15, 0]
Branch {
Labels [-1, 0]
Points [0, 95]
DstBlock "Product"
DstPort 1
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