📄 main.bfx
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#include <defBF531.h>
#include "..\header\sicnames.h"
#include "..\header\startup.h"
#include "..\header\define.h"
#include "..\tools\chn.h"
#include "data1.bfx"
#include "include.bfx"
.section L1_code;
main:
// Initialize System Configuration Register
r1 = SYSCFG_VALUE;
SYSCFG = r1;
// Reconfigure PLL_CTL Register
#if defined(PLL_MSEL) || defined(PLL_D) //倍数选择和分频
#ifdef PLL_LOCK_COUNT //default = 0x200,PLL _LOCKCNT Register Reset Value;
p0.l = lo(PLL_LOCKCNT); //PLL_LOCKCNT为锁定计数寄存器系统地址, 即0xFFC00010
p0.h = hi(PLL_LOCKCNT);
r0.l = lo(PLL_LOCK_COUNT);
r0.h = hi(PLL_LOCK_COUNT);
w[p0] = r0; //设置锁定计数寄存器的值
#endif //PLL_LOCK_COUNT
p0.l = lo(PLL_CTL);
p0.h = hi(PLL_CTL);
r1 = w[p0](z);
r2 = r1;
r0 = 0(z);
#ifdef PLL_D
bitclr(r1,0); //将r1的第0位清零
r0.l = (PLL_D & 0x1);
r1 = r1 | r0; //r1的第0位于PLL_D关联
#endif // PLL_D
#ifdef PLL_MSEL
r0.l = ~(0x3f << 9);
r1 = r1 & r0;
r0.l = ((PLL_MSEL & 0x3f) << 9);
r1 = r1 | r0;
#endif // PLL_MSEL
cc = r1 == r2; // cc 是一个条件代码，check if PLL_CTL changed
if cc jump skip_pll; // skip the PLL_CTL update
p1.l = lo(SIC_IWR); // enable PLL Wakeup Interrupt
p1.h = hi(SIC_IWR);
r0 = [p1];
bitset(r0,0);
[p1] = r0;
w[p0] = r1; // Apply PLL_CTL changes.
ssync;
// Because I am in the reset routine
// there is no need to disable(cli)/enable(sti)
// interrupts.
idle; // wait for Loop_count expired wake up
// (no ssync required).
skip_pll:
nop;
#endif //(PLL_MSEL | PLL_D)
//-------------------------------------
// Reconfigure PLL_DIV Register
// Can be done on the fly
#if defined(PLL_CSEL) | defined(PLL_SSEL)
p0.l = lo(PLL_DIV);
p0.h = hi(PLL_DIV);
r1 = w[p0](z);
r0 = 0(z);
#ifdef PLL_CSEL
r0.l = ~(0x3<<4);
r1 = r1 & r0;
r0.l = ((PLL_CSEL & 0x3)<<4);
r1 = r1 | r0;
#endif // PLL_CSEL
#ifdef PLL_SSEL
r0.l = ~(0xf);
r1 = r1 & r0;
r0.l = (PLL_SSEL & 0xf);
r1 = r1 | r0;
#endif // PLL_SSEL
w[p0] =r1;
ssync;
#endif //(PLL_CSEL | PLL_SSEL)
p0.l = lo(UART_GCTL);
p0.h = hi(UART_GCTL);
/*****************************************************************************
*
* r0 holds the timer period value, now.
* Apply formula DL = PERIOD / (16 x 8 bits) and call uart_init that writes
* the result to the two 8-bit DL registers (DLH:DLL).
*
****************************************************************************/
//call uart_autobaud;
// r0 >>= 7;
// r0 = 0x00000081;
r0 = 0x00000040;
call uart_init;
// call uart_putreg;
p1.l = lo(IMASK);
p1.h = hi(IMASK);
//*****************************************************************************
// *
// * Register TX service routine at EVT9.
// * Register RX service routine at EVT8 and error routine to EVT7.
// *
// ****************************************************************************/
r0.l = isr_uart_tx;
r0.h = isr_uart_tx;
[p1 + EVT9 - IMASK] = r0;
r0.l = isr_uart_error;
r0.h = isr_uart_error;
[p1 + EVT7 - IMASK] = r0;
r0.l = isr_uart_rx;
r0.h = isr_uart_rx;
[p1 + EVT8 - IMASK] = r0;
/*****************************************************************************
*
* Unmask EVT9 interrupt.
* Mask EVT9 interrupt and unmask EVT7 and EVT8.
*
****************************************************************************/
r0 = [p1 + IMASK - IMASK];
bitclr(r0, bitpos(EVT_IVG9));
bitset(r0, bitpos(EVT_IVG7));
bitset(r0, bitpos(EVT_IVG8));
[p1 + IMASK - IMASK] = r0;
/*****************************************************************************
*
* Enable UART TX interrupt and assign it to EVT9.
* Constants used below are defined in "sicnames.h" header.
*
****************************************************************************/
p1.l = lo(SIC_IMASK);
p1.h = hi(SIC_IMASK);
r0.l = lo(IVG_SPT0_ERROR(15) | IVG_PPI_ERROR(15) | IVG_DMA_ERROR(15) | IVG_PLL_WAKEUP(15));
r0.h = hi(IVG_RTC(15) | IVG_UART_ERROR( 7) | IVG_SPT1_ERROR(15) | IVG_SPI_ERROR(15));
[p1 + SIC_IAR0 - SIC_IMASK] = r0;
r0.l = lo(IVG_SPT1_RX(15) | IVG_SPT0_TX(15) | IVG_SPT0_RX(15) | IVG_PPI(15));
r0.h = hi(IVG_UART_TX( 9) | IVG_UART_RX( 8) | IVG_SPI(15) | IVG_SPT1_TX(15));
[p1 + SIC_IAR1 - SIC_IMASK] = r0;
r0.l = lo(IVG_PFA(15) | IVG_TIMER2(15) | IVG_TIMER1(15) | IVG_TIMER0(15));
r0.h = hi(IVG_SWDT(15) | IVG_MEMDMA1(15) | IVG_MEMDMA0(15) | IVG_PFB(15));
[p1 + SIC_IAR2 - SIC_IMASK] = r0;
r0.l = lo(IRQ_UART_RX | IRQ_UART_ERROR | IRQ_UART_TX);
r0.h = hi(IRQ_UART_RX | IRQ_UART_ERROR | IRQ_UART_TX);
[p1 + SIC_IMASK - SIC_IMASK] = r0;
/*****************************************************************************
*
* Finally enable interrupts inside UART module, by setting proper bits
* in the IER register. It is good programming style to clear potential
* UART interrupt latches in advance, by reading RBR, LSR and IIR.
*
* Setting the ETBEI bit automatically fires a TX interrupt request.
*
****************************************************************************/
r0 = w[p0+UART_RBR-UART_GCTL] (z);
r0 = w[p0+UART_LSR-UART_GCTL] (z);
r0 = w[p0+UART_IIR-UART_GCTL] (z);
r0 = ELSI | ERBFI;
w[p0+UART_IER-UART_GCTL] = r0;
/////////////////////////////////////////////////////////////
// read AMS global control register
[--sp] = p0;
P0.h = hi( EBIU_AMGCTL );
P0.l = lo( EBIU_AMGCTL );
R0.l = w[P0];
// enable all AMS banks
R1 = 0xE;
R0 = R0 | R1;
w[p0] = r0;
// set all prog flags output
R1 = 0xFF;
R0 = R0 | R1;
w[p0] = r0;
p0 = [sp++];
i0.l = aEchoFifo;
i0.h = aEchoFifo;
i1 = i0;
b0 = i0;
b1 = i0;
l0 = length(aEchoFifo);
l1 = l0;
//////////////////////// ///////////////////
call lcd_sed_set;
call sed_clear_text;
// call sed_clear_graph;
// call Delay_100_Milli_Seconds;
// call sed_graphic_test_routine;
// call sed_clear_graph;
// call sed_text_test_routine;
r0 = CN_Demo_String0;
r1 = 104;
r2 = 4;
call lcd_disp_string;
r0 = CN_Demo_String1;
r1 = 124;
r2 = 4;
call lcd_disp_string;
r0 = CN_Demo_String2;
r1 = 144;
r2 = 4;
call lcd_disp_string;
r0 = CN_Demo_String3;
r1 = 164;
r2 = 4;
call lcd_disp_string;
//call key_test;
jump key_test;
echo:
r0 = i0;
r1 = i1;
CC = r0 == r1;
if cc jump echo;
r0 = [i1++];
call uart_putc;
//call key_test;
// p2.l = lo(aEchoFifo);
// p2.h = hi(aEchoFifo);
//p5 = 40;
//lsetup(test1,test1_end)lc0 = p5;
//test1:
// r0 = w[p2++](z);
// call uart_putc;
//test1_end:
jump echo;
Delay_100_Milli_Seconds:
p5.l = lo(10*1000*1000);
p5.h = hi(10*1000*1000);
jump wait_1_Ns;
/////////////////////////////////////////////
Delay_25_Milli_Seconds:
p5.l = lo(25*1000*100);
p5.h = hi(25*1000*100);
jump wait_1_Ns;
////////////////////////////////////////
Delay_x_Milli_Seconds:
//p5.l = lo(5*1000);
//p5.h = hi(5*1000);
p5 = 0x3fff;
jump wait_1_Ns;
/////////////////////////////////////////
Delay_150_Nano_Seconds:
p5 = 150;
jump wait_1_Ns;
I2C_wait:
p5 = 10;
wait_1_Ns:
[--sp] = p0;
[--sp] = r0;
[--sp] = lc1;
p0.l = lo(flash_bank04);
p0.h = hi(flash_bank04);
lsetup ( Wait_begin, Wait_end ) lc1 = p5;
Wait_begin:
r7 = w[p0](z);
Wait_end: nop;
lc1 = [sp++];
r0 = [sp++];
p0 = [sp++];
rts;
I2C_waitx:
[--sp] = p0;
[--sp] = r0;
[--sp] = r1;
[--sp] = p5;
p0.l = lo(flash_bank04);
p0.h = hi(flash_bank04);
//p5.l = 0x1000;
//p5.l = 0x10;
//p5.h = 0x0;
//p5 = 0x80;
//r1 = p5;
r1 = 10;
wait_loop1:
r0 = w[p0](z);
r1 += -1;
cc = r1 == 1;
if !cc jump wait_loop1;
p5 = [sp++];
r1 = [sp++];
r0 = [sp++];
p0 = [sp++];
rts;
wait_4us:
[--sp] = p0;
[--sp] = r0;
[--sp] = r1;
[--sp] = p5;
p0.l = lo(flash_bank04);
p0.h = hi(flash_bank04);
//p5.l = 0x1000;
//p5.l = 0x10;
//p5.h = 0x0;
p5 = 0x7f;
r1 = p5;
//r1 = 10;
wait_4us_loop1:
r0 = w[p0](z);
r1 += -1;
cc = r1 == 1;
if !cc jump wait_4us_loop1;
p5 = [sp++];
r1 = [sp++];
r0 = [sp++];
p0 = [sp++];
rts;
/*
p5 = 200;
wait_1_Nsx:
[--sp] = p0;
[--sp] = r7;
[--sp] = lc0;
p0.l = lo(flash_bank04);
p0.h = hi(flash_bank04);
lsetup ( Wait_beginx, Wait_endx ) lc0 = p5;
Wait_beginx:
r7 = w[p0](z);
Wait_endx: nop;
lc0 = [sp++];
r7 = [sp++];
p0 = [sp++];
rts;
*/
wait_1s:
[--sp] = p0;
[--sp] = r0;
p0.l = lo(flash_bank04);
p0.h = hi(flash_bank04);
p5.l = 0x0000;
p5.h = 0x10;
r1 = p5;
wait_loop:
r0 = b[p0](z);
r1 += -1;
cc = r1 == 1;
if !cc jump wait_loop;
r0 = [sp++];
p0 = [sp++];
rts;
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