📄 trap.c
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/*
* File : trap.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.fayfayspace.org/license/LICENSE.
*
* Change Logs:
* Date Author Notes
* 2006-03-13 Bernard first version
* 2006-05-27 Bernard add skyeye support
*/
#include <rtthread.h>
#include <rthw.h>
#include "s3c4510.h"
/*!
* \addtogroup xgs3c4510
*/
/*@{*/
/*!
* \brief show CPU's registers
*
* this function will show registers of CPU
*
* \param regs the registers point
*/
void rt_hw_show_register (struct rt_hw_register *regs)
{
rt_kprintf("Execption:\n");
rt_kprintf("r00:0x%08x r01:0x%08x r02:0x%08x r03:0x%08x\n", regs->r0, regs->r1, regs->r2, regs->r3);
rt_kprintf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", regs->r4, regs->r5, regs->r6, regs->r7);
rt_kprintf("r08:0x%08x r09:0x%08x r10:0x%08x\n", regs->r8, regs->r9, regs->r10);
rt_kprintf("fp :0x%08x ip :0x%08x\n", regs->fp, regs->ip);
rt_kprintf("sp :0x%08x lr :0x%08x pc :0x%08x\n", regs->sp, regs->lr, regs->pc);
rt_kprintf("cpsr:0x%08x\n", regs->cpsr);
}
/*!
* \brief trap because undefined instruction
*
* When ARM7TDMI comes across an instruction which it cannot handle,
* it takes the undefined instruction trap.
*
* \param regs system registers
*
* \note never invoke this function in application
*/
void rt_hw_trap_udef(struct rt_hw_register *regs)
{
rt_kprintf("undefined instruction\n");
rt_hw_show_register(regs);
rt_hw_cpu_shutdown();
}
/*!
* \brief trap because software interrupt
*
* The software interrupt instruction (SWI) is used for entering
* Supervisor mode, usually to request a particular supervisor
* function.
*
* \param regs system registers
*
* \note never invoke this function in application
*/
void rt_hw_trap_swi(struct rt_hw_register *regs)
{
rt_kprintf("software interrupt\n");
rt_hw_show_register(regs);
rt_hw_cpu_shutdown();
}
/*!
* \brief trap because abort occurs during an instruction prefetch.
*
* An abort indicates that the current memory access cannot be completed,
* which occurs during an instruction prefetch.
*
* \param regs system registers
*
* \note never invoke this function in application
*/
void rt_hw_trap_pabt(struct rt_hw_register *regs)
{
rt_kprintf("prefetch abort\n");
rt_hw_show_register(regs);
rt_hw_cpu_shutdown();
}
/*!
* \brief trap because abort occurs during a data access.
*
* An abort indicates that the current memory access cannot be completed,
* which occurs during a data access.
*
* \param regs system registers
*
* \note never invoke this function in application
*/
void rt_hw_trap_dabt(struct rt_hw_register *regs)
{
rt_kprintf("Data Abort ");
rt_hw_show_register(regs);
rt_hw_cpu_shutdown();
}
/*!
* \brief trap because reserved reason
*
* normally, never reach here
*
* \param regs system registers
*
* \note never invoke this function in application
*/
void rt_hw_trap_resv(struct rt_hw_register *regs)
{
rt_kprintf("not used\n");
rt_hw_show_register(regs);
rt_hw_cpu_shutdown();
}
#define __SKYEYE__
extern rt_isr_handler_t isr_table[];
void rt_hw_trap_irq()
{
#ifndef __SKYEYE__
unsigned long intstat;
rt_isr_handler_t isr_func;
intstat = INTOFFSET;
/* check pending according um_4510b */
if ( intstat == 0x54 ) return;
else intstat = intstat >> 2;
/* get interrupt service routine */
isr_func = isr_table[intstat];
/* turn to interrupt service routine */
isr_func(intstat);
/* clear pending register */
INTPEND = 1 << intstat;
#else
register int offset;
unsigned long pend;
rt_isr_handler_t isr_func;
pend = INTPEND;
for (offset = 0; offset < INTGLOBAL; offset ++)
{
if (pend & (1 << offset)) break;
}
if (offset == INTGLOBAL) return;
/* get interrupt service routine */
isr_func = isr_table[offset];
/* turn to interrupt service routine */
isr_func(offset);
/* clear pending register */
INTPEND = 1 << offset;
#endif
}
void rt_hw_trap_fiq()
{
rt_kprintf("fast interrupt request\n");
}
/*@}*/
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