start.s

RT-Thread是发展中的下一代微内核嵌入式实时操作系统

/*
 * File      : start.S
 * This file is part of RT-Thread RTOS
 * COPYRIGHT (C) 2006 - 2007, RT-Thread Development Team
 *
 * The license and distribution terms for this file may be
 * found in the file LICENSE in this distribution or at
 * http://openlab.rt-thread.com/license/LICENSE.
 *
 * Change Logs:
 * Date           Author       Notes
 * 2007-03-11     Bernard      first version
 */

/**
 * @addtogroup PXA270
 */
/*@{*/

	.equ USERMODE, 	0x10
	.equ FIQMODE,	0x11
	.equ IRQMODE,	0x12
	.equ SVCMODE,	0x13
	.equ ABORTMODE,	0x17
	.equ UNDEFMODE,	0x1b
	.equ MODEMASK,	0x1f
	.equ NOINT,		0xc0

.globl _start
_start:
	b	reset
	ldr	pc, _vector_undef
	ldr	pc, _vector_swi
	ldr	pc, _vector_pabt
	ldr	pc, _vector_dabt
	ldr	pc, _vector_resv
	ldr	pc, _vector_irq
	ldr	pc, _vector_fiq

_vector_undef:	.word vector_undef
_vector_swi:	.word vector_swi
_vector_pabt:	.word vector_pabt
_vector_dabt:	.word vector_dabt
_vector_resv:	.word vector_resv
_vector_irq:	.word vector_irq
_vector_fiq:	.word vector_fiq

	.balignl 16,0xdeadbeef

_TEXT_BASE: 	.word	TEXT_BASE

/*
 * rtthread kernel start and end
 * which are defined in linker script
 */
.globl _rtthread_start
_rtthread_start:.word _start
.globl _rtthread_end
_rtthread_end:	.word  _end

/*
 * rtthread bss start and end
 * which are defined in linker script
 */
.globl _bss_start
_bss_start:	.word __bss_start
.globl _bss_end
_bss_end:	.word __bss_end

/* IRQ stack memory */
.globl IRQSTACK_START
IRQSTACK_START:.word _irq_stack_start + 1024
.globl FIQSTACK_START
FIQSTACK_START:.word _fiq_stack_start + 1024
.globl UNDSTACK_START
UNDSTACK_START:.word _undefined_stack_start + 128
.globl ABTSTACK_START
ABTSTACK_START:.word _abort_stack_start + 128
.globl SVCSTACK_START
SVCSTACK_START:.word _svc_stack_start + 4096

/* the system entry */
reset:
	/* mask all IRQs by clearing all bits in the ICMP */
	ldr	r1, =XSCALE_PXA_ICMP
	ldr	r0, =0x00
	str	r0, [r1]
	
	/* setup stack */
	bl	stack_setup
	
	/* lowlevel init */
	bl lowlevel_init
	
	/* start RT-Thread Kernel */
	ldr	pc, _rtthread_startup

XSCALE_PXA_ICMP	 : .word 0x40d00004
_rtthread_startup: .word rtthread_startup

/* exception handlers */
vector_undef: 	bl	rt_hw_trap_udef
vector_swi:		bl 	rt_hw_trap_swi
vector_pabt:	bl 	rt_hw_trap_pabt
vector_dabt:	bl 	rt_hw_trap_dabt
vector_resv:	bl 	rt_hw_trap_resv

.globl rt_interrupt_enter
.globl rt_interrupt_leave
.globl rt_thread_switch_interrput_flag
.globl rt_interrupt_from_thread
.globl rt_interrupt_to_thread
vector_irq:
	stmfd	sp!, {r0-r12,lr}
	bl	rt_interrupt_enter
	bl	rt_hw_trap_irq
	bl	rt_interrupt_leave

	/* 
	 * if rt_thread_switch_interrput_flag set, 
	 * jump to _interrupt_thread_switch and don't return
	 */
	ldr	r0, =rt_thread_switch_interrput_flag
	ldr	r1, [r0]
	cmp	r1, #1
	beq	_interrupt_thread_switch

	ldmfd	sp!, {r0-r12,lr}
	subs	pc, lr, #4

vector_fiq:
	stmfd	sp!,{r0-r7,lr}
	bl 	rt_hw_trap_fiq
	ldmfd	sp!,{r0-r7,lr}
	subs	pc,lr,#4

_interrupt_thread_switch:
	mov	r1,  #0					@ clear rt_thread_switch_interrput_flag
	str	r1,  [r0]

	ldmfd sp!, {r0-r12,lr}		@ reload saved registers
	stmfd sp!, {r0-r3}			@ save r0-r3
	mov	r1,  sp
	add	sp,  sp, #16			@ restore sp
	sub	r2,  lr, #4				@ save old task's pc to r2

	mrs	r3,  spsr				@ disable interrupt
	orr	r0,  r3, #NOINT
	msr	spsr_c, r0

	ldr	r0,  =.+8				@ switch to interrupted task's stack
	movs	pc,  r0

	stmfd	sp!, {r2}			@ push old task's pc
	stmfd	sp!, {r4-r12,lr}	@ push old task's lr,r12-r4
	mov	r4,  r1					@ Special optimised code below
	mov	r5,  r3
	ldmfd	r4!, {r0-r3}
	stmfd	sp!, {r0-r3}		@ push old task's r3-r0
	stmfd	sp!, {r5}			@ push old task's psr
	mrs	r4,  spsr
	stmfd	sp!, {r4}			@ push old task's spsr

	ldr	r4,  =rt_interrupt_from_thread
	ldr	r5,  [r4]
	str	sp,  [r5]				@ store sp in preempted tasks's TCB

	ldr	r6,  =rt_interrupt_to_thread
	ldr	r6,  [r6]
	ldr	sp,  [r6]				@ get new task's stack pointer

	ldmfd	sp!, {r4}			@ pop new task's spsr
	msr	SPSR_cxsf, r4
	ldmfd	sp!, {r4}			@ pop new task's psr
	msr	CPSR_cxsf, r4

	ldmfd	sp!, {r0-r12,lr,pc}	@ pop new task's r0-r12,lr & pc

stack_setup:
	/* undefined instruction mode */
	msr cpsr_c, #UNDEFMODE|NOINT
	ldr sp, UNDSTACK_START

	/* abort mode */
	msr cpsr_c, #ABORTMODE|NOINT
	ldr sp, ABTSTACK_START

	/* FIQ mode */
	msr cpsr_c, #FIQMODE|NOINT
	ldr sp, FIQSTACK_START

	/* IRQ mode */
	msr cpsr_c, #IRQMODE|NOINT
	ldr sp, IRQSTACK_START

	/* supervisor mode */
	msr cpsr_c, #SVCMODE|NOINT
	ldr sp, SVCSTACK_START

	mov	pc,lr