board.c

RT-Thread是发展中的下一代微内核嵌入式实时操作系统

/*
 * File      : board.c
 * This file is part of RT-Thread RTOS
 * COPYRIGHT (C) 2006, RT-Thread Develop Team
 *
 * The license and distribution terms for this file may be
 * found in the file LICENSE in this distribution or at
 * http://openlab.rt-thread.com/license/LICENSE
 *
 * Change Logs:
 * Date           Author       Notes
 * 2006-03-24     Bernard      first implementation
 * 2006-05-05     Bernard      add DATA_COUNT definition
 * 2006-10-05     Alsor.Z      for s3c2410x porting	
 */

#include <rtthread.h>
#include <rthw.h>

#include <s3c2410.h>

/**
 * @addtogroup s3ceb2410
 */
/*@{*/

#ifndef CONFIG_SYS_CLK_FREQ
  #define CONFIG_SYS_CLK_FREQ	12000000	// Fin = 12.00MHz
#endif

static rt_uint32 timer_load_val = 0;

rt_uint32 PCLK = 0;

#define MPLL	0
#define	UPLL	1


/* -------------------------------------------------------------------------
 * NOTE: This describes the proper use of this file.
 *
 * CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL.
 *
 * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of
 * the specified bus in HZ.
 * -------------------------------------------------------------------------*/

static rt_uint32 get_PLLCLK(int reg)
{
    rt_uint32 r, m, p, s;
	/* Fout = m * Fin / (p*(2^s)), Fvco = m * Fin / p 
	 * where : m=MDIV+8, p=PDIV+2, s=SDIV 
	 */
    if (reg == MPLL)
		r = MPLLCON;
    else if (reg == UPLL)
		r = UPLLCON;
    else
		rt_hw_cpu_shutdown();

    m = ((r & 0xFF000) >> 12) + 8;	//MDIV + 8
    p = ((r & 0x003F0) >> 4) + 2;	//PDIV + 2
    s = r & 0x3;					//SDIV

    return((CONFIG_SYS_CLK_FREQ * m) / (p << s));	// Fout
}

/* return FCLK frequency */
rt_uint32 get_FCLK(void)
{
    return(get_PLLCLK(MPLL));
}

/* return HCLK frequency */
rt_uint32 get_HCLK(void)
{
    return((CLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK());
}

/* return UCLK frequency */
rt_uint32 get_UCLK(void)
{
    return(get_PLLCLK(UPLL));
}

/* return PCLK frequency */
rt_uint32 get_PCLK(void)
{
    return ((CLKDIVN & 0x1) ? get_HCLK()/2 : get_HCLK());
}

void rt_timer_handler(int vector)
{
	/* reset TDATA0 */
	TCNTB4 = timer_load_val;
	
	rt_tick_increase();
}

/**
 * This function will init s3ceb2410 board
 */
void rt_hw_board_init()
{
	/* use PWM Timer 4 because it has no output */
	/* prescaler for Timer 4 is 16 */
	TCFG0 = 0x0f00;

	/* all divider = 1/2 */
	TCFG1 = 0x0;
	
	PCLK = get_PCLK();
	if (timer_load_val == 0)
	{
		/*
		 * for 10 ms clock period @ PCLK with 4 bit divider = 1/2
		 * (default) and prescaler = 16. Should be 10390
		 * @33.25MHz and 15625 @ 50 MHz
		 */
		timer_load_val = PCLK/(2 * 16 * 100);
	}
	/* load value for 10 ms timeout */
	TCNTB4 = timer_load_val;
	/* auto load, manual update of Timer 4 */
	TCON = (TCON & ~0x0700000) | 0x600000;
	/* auto load, start Timer 4 */
	TCON = (TCON & ~0x0700000) | 0x500000;

	/* install interrupt handler */
	rt_hw_interrupt_install(INTTIMER0, rt_timer_handler, RT_NULL);
	rt_hw_interrupt_umask(INTTIMER0);

	/* stop timer 	*/
	/* TCON = 0x0;	*/
}

/*@}*/