📄 class.ptf
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#
# This class.ptf file built by Component Editor
# 2006.03.27.18:54:54
#
# DO NOT MODIFY THIS FILE
# If you hand-modify this file you will likely
# interfere with Component Editor's ability to
# read and edit it. And then Component Editor
# will overwrite your changes anyway. So, for
# the very best results, just relax and
# DO NOT MODIFY THIS FILE
#
CLASS altera_avalon_i2c_slave
{
CB_GENERATOR
{
HDL_FILES
{
FILE
{
use_in_simulation = "1";
use_in_synthesis = "1";
filepath = "hdl/altera_avalon_i2c_slave.vhd";
}
}
top_module_name = "altera_avalon_i2c_slave.vhd:altera_avalon_i2c_slave";
emit_system_h = "0";
LIBRARIES
{
library = "ieee.std_logic_1164.all";
library = "ieee.numeric_std.all";
library = "std.standard.all";
}
}
MODULE_DEFAULTS global_signals
{
class = "altera_avalon_i2c_slave";
class_version = "1.0";
SYSTEM_BUILDER_INFO
{
Instantiate_In_System_Module = "1";
Has_Clock = "1";
Top_Level_Ports_Are_Enumerated = "1";
}
COMPONENT_BUILDER
{
GLS_SETTINGS
{
}
}
PORT_WIRING
{
PORT sys_clk
{
width = "1";
width_expression = "";
direction = "input";
type = "clk";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
PORT sys_reset_n
{
width = "1";
width_expression = "";
direction = "input";
type = "reset_n";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
}
WIZARD_SCRIPT_ARGUMENTS
{
hdl_parameters
{
}
}
SIMULATION
{
DISPLAY
{
}
}
SLAVE s0
{
SYSTEM_BUILDER_INFO
{
Bus_Type = "avalon";
Address_Group = "1";
Has_Clock = "0";
Address_Width = "2";
Address_Alignment = "native";
Data_Width = "8";
Has_Base_Address = "1";
Has_IRQ = "1";
Setup_Time = "0cycles";
Hold_Time = "0cycles";
Read_Wait_States = "0cycles";
Write_Wait_States = "0cycles";
Read_Latency = "0";
Maximum_Pending_Read_Transactions = "0";
Active_CS_Through_Read_Latency = "0";
Is_Printable_Device = "0";
Is_Memory_Device = "0";
Is_Readable = "0";
Is_Writable = "1";
Minimum_Uninterrupted_Run_Length = "1";
}
COMPONENT_BUILDER
{
AVS_SETTINGS
{
Setup_Value = "0";
Read_Wait_Value = "0";
Write_Wait_Value = "0";
Hold_Value = "0";
Timing_Units = "cycles";
Read_Latency_Value = "0";
Minimum_Arbitration_Shares = "1";
Active_CS_Through_Read_Latency = "0";
Max_Pending_Read_Transactions_Value = "1";
Address_Alignment = "native";
Is_Printable_Device = "0";
interface_name = "Avalon Slave";
external_wait = "0";
Is_Memory_Device = "0";
}
}
PORT_WIRING
{
PORT avalon_write
{
width = "1";
width_expression = "";
direction = "input";
type = "write";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
PORT avalon_writedata
{
width = "8";
width_expression = "";
direction = "input";
type = "writedata";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
PORT avalon_address
{
width = "2";
width_expression = "";
direction = "input";
type = "address";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
PORT avalon_readdata
{
width = "8";
width_expression = "";
direction = "output";
type = "readdata";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
PORT avalon_interrupt
{
width = "1";
width_expression = "";
direction = "output";
type = "irq";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
PORT scl
{
width = "1";
width_expression = "";
direction = "input";
type = "export";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
PORT sda
{
width = "1";
width_expression = "";
direction = "inout";
type = "export";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
}
}
}
USER_INTERFACE
{
USER_LABELS
{
name = "altera_avalon_i2c_slave";
technology = "i2c_components";
}
WIZARD_UI the_wizard_ui
{
title = "altera_avalon_i2c_slave - {{ $MOD }}";
CONTEXT
{
H = "WIZARD_SCRIPT_ARGUMENTS/hdl_parameters";
M = "";
SBI_global_signals = "SYSTEM_BUILDER_INFO";
SBI_s0 = "SLAVE s0/SYSTEM_BUILDER_INFO";
}
PAGES main
{
PAGE 1
{
align = "left";
title = "<b>altera_avalon_i2c_slave 1.0</b> Settings";
layout = "vertical";
TEXT
{
title = "Built on: 2006.03.27.18:54:54";
}
TEXT
{
title = "Class name: altera_avalon_i2c_slave";
}
TEXT
{
title = "Class version: 1.0";
}
TEXT
{
title = "Component name: altera_avalon_i2c_slave";
}
TEXT
{
title = "Component Group: i2c_components";
}
}
}
}
}
SOPC_Builder_Version = "5.10";
COMPONENT_BUILDER
{
HDL_PARAMETERS
{
# generated by CBDocument.getParameterContainer
# used only by Component Editor
}
SW_FILES
{
}
built_on = "2006.03.27.18:54:54";
CACHED_HDL_INFO
{
# cached hdl info, emitted by CBFrameRealtime.getDocumentCachedHDLInfoSection
# used only by Component Builder
FILE altera_avalon_i2c_slave.vhd
{
file_mod = "Mon Mar 27 17:47:33 CST 2006";
quartus_map_start = "Mon Mar 27 18:53:21 CST 2006";
quartus_map_finished = "Mon Mar 27 18:53:31 CST 2006";
#found 1 valid modules
WRAPPER altera_avalon_i2c_slave
{
CLASS altera_avalon_i2c_slave
{
CB_GENERATOR
{
HDL_FILES
{
FILE
{
use_in_simulation = "1";
use_in_synthesis = "1";
filepath = "C:/WORK/Customer_Designs/Altera_East/Tim_Whiting/i2c_led_sch_restored/altera_avalon_i2c_slave.vhd";
}
}
top_module_name = "altera_avalon_i2c_slave";
emit_system_h = "0";
LIBRARIES
{
library = "ieee.std_logic_1164.all";
library = "ieee.numeric_std.all";
library = "std.standard.all";
}
}
MODULE_DEFAULTS global_signals
{
class = "altera_avalon_i2c_slave";
class_version = "1.0";
SYSTEM_BUILDER_INFO
{
Instantiate_In_System_Module = "1";
}
SLAVE sys
{
SYSTEM_BUILDER_INFO
{
Bus_Type = "avalon";
}
PORT_WIRING
{
PORT sys_clk
{
width = "1";
width_expression = "";
direction = "input";
type = "clk";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
PORT sys_reset_n
{
width = "1";
width_expression = "";
direction = "input";
type = "reset_n";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
}
}
SLAVE avalon
{
SYSTEM_BUILDER_INFO
{
Bus_Type = "avalon";
}
PORT_WIRING
{
PORT avalon_write
{
width = "1";
width_expression = "";
direction = "input";
type = "write";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
PORT avalon_writedata
{
width = "8";
width_expression = "";
direction = "input";
type = "writedata";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
PORT avalon_address
{
width = "2";
width_expression = "";
direction = "input";
type = "address";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
PORT avalon_readdata
{
width = "8";
width_expression = "";
direction = "output";
type = "readdata";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
}
}
SLAVE avalon_slave_0
{
SYSTEM_BUILDER_INFO
{
Bus_Type = "avalon";
}
PORT_WIRING
{
PORT avalon_interrupt
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
PORT scl
{
width = "1";
width_expression = "";
direction = "input";
type = "export";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
PORT sda
{
width = "1";
width_expression = "";
direction = "inout";
type = "export";
is_shared = "0";
vhdl_record_name = "";
vhdl_record_type = "";
}
}
}
}
USER_INTERFACE
{
USER_LABELS
{
name = "altera_avalon_i2c_slave";
technology = "imported components";
}
}
SOPC_Builder_Version = "0.0";
}
}
}
}
}
ASSOCIATED_FILES
{
Add_Program = "the_wizard_ui";
Edit_Program = "the_wizard_ui";
Generator_Program = "cb_generator.pl";
}
}
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