textx86stream.java

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	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeNEG(Register)
	 */
	public void writeNEG(Register dstReg) {

		println("\tneg " + dstReg);
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeNOP()
	 */
	public void writeNOP() {

		println("\tnop");
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeOR(Register, int, Register)
	 */
	public void writeOR(Register dstReg, int dstDisp, Register srcReg) {

		println("\tor dword [" + dstReg + disp(dstDisp) + "]," + srcReg);
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeOR(Register, Register)
	 */
	public void writeOR(Register dstReg, Register srcReg) {

		println("\tor " + dstReg + "," + srcReg);
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writePOP(Register, int)
	 */
	public void writePOP(Register dstReg, int dstDisp) {

		println("\tpop dword [" + dstReg + disp(dstDisp) + "]");
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writePOP(Register)
	 */
	public void writePOP(Register dstReg) {

		println("\tpop " + dstReg);
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writePUSH(int)
	 * @return The ofset of the start of the instruction.
	 */
	public int writePUSH(int imm32) {
		return println("\tpush 0x" + NumberUtils.hex(imm32));
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writePUSH(Register, int)
	 * @return The ofset of the start of the instruction.
	 */
	public int writePUSH(Register srcReg, int srcDisp) {
		return println("\tpush dword [" + srcReg + disp(srcDisp) + "]");
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writePUSH(Register, Register, int, int)
	 * @return The ofset of the start of the instruction.
	 */
	public int writePUSH(Register srcBaseReg, Register srcIndexReg, int srcScale, int srcDisp) {
		return println("\tpush dword [" + srcBaseReg + disp(srcDisp) + "+" + srcIndexReg + "*" + srcScale + "]");
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writePUSH(Register)
	 * @return The ofset of the start of the instruction.
	 */
	public int writePUSH(Register srcReg) {
		return println("\tpush " + srcReg);
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeRET()
	 */
	public void writeRET() {

		println("\tret");
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeRET(int)
	 */
	public void writeRET(int imm16) {

		println("\tret " + imm16);
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeSAHF()
	 */
	public void writeSAHF() {

		println("\tsahf");
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeSAL_CL(Register)
	 */
	public void writeSAL_CL(Register dstReg) {

		println("\tsal " + dstReg + ",cl");
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeSAL(Register, int)
	 */
	public void writeSAL(Register dstReg, int imm8) {

		println("\tsal " + dstReg + "," + imm8);
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeSAR_CL(Register)
	 */
	public void writeSAR_CL(Register dstReg) {

		println("\tsar " + dstReg + ",cl");
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeSAR(Register, int)
	 */
	public void writeSAR(Register dstReg, int imm8) {

		println("\tsar " + dstReg + "," + imm8);
	}

	/**
	 * Create a SBB dstReg, imm32
	 * 
	 * @param dstReg
	 * @param imm32
	 */
	public void writeSBB(Register dstReg, int imm32) {

		println("\tsbb " + dstReg + ",0x" + NumberUtils.hex(imm32));
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeSBB(Register, int, int)
	 */
	public void writeSBB(Register dstReg, int dstDisp, int imm32) {

		println("\tsbb dword [" + dstReg + disp(dstDisp) + "],0x" + NumberUtils.hex(imm32));
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeSBB(Register, int, Register)
	 */
	public void writeSBB(Register dstReg, int dstDisp, Register srcReg) {

		println("\tsbb dword [" + dstReg + disp(dstDisp) + "]," + srcReg);
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeSBB(Register, Register)
	 */
	public void writeSBB(Register dstReg, Register srcReg) {

		println("\tsbb " + dstReg + "," + srcReg);
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeSHL_CL(Register)
	 */
	public void writeSHL_CL(Register dstReg) {

		println("\tshl " + dstReg + ",cl");
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeSHL(Register, int)
	 */
	public void writeSHL(Register dstReg, int imm8) {

		println("\tshl " + dstReg + "," + imm8);
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeSHLD_CL(Register, Register)
	 */
	public void writeSHLD_CL(Register dstReg, Register srcReg) {

		println("\tshld " + dstReg + "," + srcReg + ",cl");
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeSHR_CL(Register)
	 */
	public void writeSHR_CL(Register dstReg) {

		println("\tshr " + dstReg + ",cl");
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeSHR(Register, int)
	 */
	public void writeSHR(Register dstReg, int imm8) {

		println("\tshr " + dstReg + "," + imm8);
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeSHRD_CL(Register, Register)
	 */
	public void writeSHRD_CL(Register dstReg, Register srcReg) {

		println("\tshrd " + dstReg + "," + srcReg + ",cl");
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeSUB(Register, int, Register)
	 */
	public void writeSUB(Register dstReg, int dstDisp, Register srcReg) {

		println("\tsub dword [" + dstReg + disp(dstDisp) + "]," + srcReg);
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeSUB(Register, Register)
	 */
	public void writeSUB(Register dstReg, Register srcReg) {
		println("\tsub " + dstReg + "," + srcReg);
	}

	/**
	 * Create a SUB reg, imm32
	 * 
	 * @param reg
	 * @param imm32
	 */
	public final void writeSUB(Register reg, int imm32) {
		println("\tsub " + reg + "," + imm32);
	}
	
	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeTEST_AL(int)
	 */
	public void writeTEST_AL(int value) {

		println("\ttest al," + value);
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeTEST_EAX(int)
	 */
	public void writeTEST_EAX(int value) {

		println("\ttest eax," + value);
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeTEST(Register, int)
	 */
	public void writeTEST(Register reg, int imm32) {

		println("\ttest " + reg + ",0x" + NumberUtils.hex(imm32));
	}

	/**
	 * Create a TEST reg1, reg2
	 * 
	 * @param reg1
	 * @param reg2
	 */
	public void writeTEST(Register reg1, Register reg2) {

		println("\ttest " + reg1 + "," + reg2);
	}
	
	/**
	 * Create 32-bit offset relative to the current (after this offset) offset.
	 * @param label
	 */
	public void writeRelativeObjectRef(Label label) {
	    println("\tdd relative " + label);
	}
	
	/**
	 * @see org.jnode.assembler.NativeStream#writeTo(java.io.OutputStream)
	 */
	public void writeTo(OutputStream os) throws IOException {
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeXOR(Register, int, Register)
	 */
	public void writeXOR(Register dstReg, int dstDisp, Register srcReg) {
		println("\txor dword [" + dstReg + disp(dstDisp) + "]," + srcReg);
	}

	/**
	 * @see org.jnode.assembler.x86.AbstractX86Stream#writeXOR(Register, Register)
	 */
	public void writeXOR(Register dstReg, Register srcReg) {
		println("\txor " + dstReg + "," + srcReg);
	}

	private final String operandSize(int opSize) {
		switch (opSize) {
			case BITS8 :
				return "byte";
			case BITS16 :
				return "word";
			case BITS32 :
				return "dword";
			default :
				throw new IllegalArgumentException("Unknown operant size " + opSize);
		}
	}

	private static final String ccName(int jumpOpcode) {
		final String opc;
		switch (jumpOpcode) {
			case JA :
				opc = "a";
				break;
			case JAE :
				opc = "ae";
				break;
			case JB :
				opc = "b";
				break;
			case JBE :
				opc = "be";
				break;
			case JE :
				opc = "e";
				break;
			case JNE :
				opc = "ne";
				break;
			case JLE :
				opc = "le";
				break;
			case JL :
				opc = "l";
				break;
			case JGE :
				opc = "ge";
				break;
			case JG :
				opc = "g";
				break;
			default :
				throw new RuntimeException("Unknown jump opcode " + jumpOpcode);
		}
		return opc;
	}

	class ObjectRefImpl extends NativeStream.ObjectRef {

		public ObjectRefImpl(Object object) {
			super(object);
		}

		/**
		 * @see org.jnode.assembler.NativeStream.ObjectRef#getOffset()
		 */
		public int getOffset() throws UnresolvedObjectRefException {
			return 0;
		}

		/**
		 * @see org.jnode.assembler.NativeStream.ObjectRef#isResolved()
		 */
		public boolean isResolved() {
			return true;
		}

		/**
		 * @see org.jnode.assembler.NativeStream.ObjectRef#link(org.jnode.assembler.NativeStream.ObjectRef)
		 */
		public void link(ObjectRef objectRef) throws UnresolvedObjectRefException {
		}

	}

	class ObjectInfoImpl extends NativeStream.ObjectInfo {

		/**
		 * @see org.jnode.assembler.NativeStream.ObjectInfo#markEnd()
		 */
		public void markEnd() {
			println(";\n; -- End of Object --\n;");
		}

	}

	/**
	 * Is logging enabled. This method will only return true on on debug like implementations.
	 * 
	 * @return boolean
	 */
	public boolean isLogEnabled() {
		return true;
	}

	/**
	 * Write a log message. This method is only implemented on debug like implementations.
	 * 
	 * @param msg
	 */
	public void log(Object msg) {
		println(";\n; " + msg + "\n;");
	}

	protected final int println(String msg) {
		final int rc = idx + buf.length();
		buf.append(msg);
		buf.append('\n');
		return rc;
	}

	private String disp(int v) {
		if (v > 0) {
			return "+" + v;
		} else if (v < 0) {
			return "" + v;
		} else {
			return "";
		}
	}
}