hwdrv_apci1500.c

最新版comedi的源码

                        i_RegValue=inb(devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);  
                      
                       /* Selects the master interrupt control register */
                       /*************************************************/
                       outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);  
                       /**********************************************/
                       /* Authorizes the main interrupt on the board */
	               /**********************************************/ 
                       outb(0xD0,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
                        
                        }// if(i_Event1Status==1)
                    else
                        {
                        printk("\nEvent 1 not initialised\n");
                        return -EINVAL;
                        }//else if(i_Event1Status==1)
                      }//if (data[1]==1)
                      if(data[1]==2)
                         {
                          
                          if(i_Event2Status==1)
                            {
                            /*****************************************************************/
		            /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
		            /*****************************************************************/
                            outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
                       /******************/
		       /* Disable Port B */
		       /******************/
                            outb(0x74,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
		       /***************************************************/
		       /* Selects the command and status register of      */
		       /* port 2                                          */
		       /***************************************************/
		            outb( APCI1500_RW_PORT_B_COMMAND_AND_STATUS,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
                       /*************************************/
		       /* Allows the pattern interrupt      */
		       /*************************************/
                            outb(0xC0,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);   
                       /*****************************************************************/
		       /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
		       /*****************************************************************/
                            outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
                       /*****************/
		       /* Enable Port B */
		       /*****************/ 
                           outb(0xF4,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER); 

                       /* Selects the master interrupt control register */
                       /*************************************************/
                       outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);  
                       /**********************************************/
                       /* Authorizes the main interrupt on the board */
	               /**********************************************/ 
                       outb(0xD0,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
                           i_Event2InterruptStatus=1;
                           }// if(i_Event2Status==1)
                       else
                           {
                           printk("\nEvent 2 not initialised\n");
                           return -EINVAL;
                           }//else if(i_Event2Status==1)
                      }// if(data[1]==2)
                   }// if (data[1] == 1 || data[0] == 2)
                else
                   {
                     printk("\nThe port parameter is in error\n");
                     return -EINVAL;
                    }//else if (data[1] == 1 || data[0] == 2)
  
                 break;
                   
      case STOP :
                  /*************************/
	          /* Tests the port number */
	          /*************************/
   
	      if (data[1] == 1 || data[1] == 2)
	         {
	          /***************************/
	          /* Test if port 1 selected */
	          /***************************/

	         if ( data[1] == 1)
		    {
		    /*****************************/
		    /* Test if event initialised */
		    /*****************************/
                    if(i_Event1Status==1)
                       {
                       /*****************************************************************/
		       /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
		       /*****************************************************************/
                       outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
                       /******************/
		       /* Disable Port A */
		       /******************/
                       outb(0xF0,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
		       /***************************************************/
		       /* Selects the command and status register of      */
		       /* port 1                                          */
		       /***************************************************/
		        outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
                       /*************************************/
		       /* Inhibits the pattern interrupt      */
		       /*************************************/
                        outb(0xE0,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);   
                       /*****************************************************************/
		       /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
		       /*****************************************************************/
                        outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
                       /*****************/
		       /* Enable Port A */
		       /*****************/ 
                        outb(0xF4,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER); 
                        i_Event1InterruptStatus=0;
                        }// if(i_Event1Status==1)
                    else
                        {
                        printk("\nEvent 1 not initialised\n");
                        return -EINVAL;
                        }//else if(i_Event1Status==1)
                      }//if (data[1]==1)
                    if(data[1]==2)
                       {
                         /*****************************/
		         /* Test if event initialised */
		         /*****************************/
                        if(i_Event2Status==1)
                          {
                          /*****************************************************************/
		          /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
		          /*****************************************************************/
                          outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
                          /******************/
		          /* Disable Port B */
		          /******************/
                          outb(0x74,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
		          /***************************************************/
		          /* Selects the command and status register of      */
		          /* port 2                                         */
		          /***************************************************/
		        outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
                       /*************************************/
		       /* Inhibits the pattern interrupt      */
		       /*************************************/
                        outb(0xE0,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);   
                       /*****************************************************************/
		       /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
		       /*****************************************************************/
                        outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
                       /*****************/
		       /* Enable Port B */
		       /*****************/ 
                        outb(0xF4,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER); 
                        i_Event2InterruptStatus=0;
                        }// if(i_Event2Status==1)
                    else
                        {
                        printk("\nEvent 2 not initialised\n");
                        return -EINVAL;
                        }//else if(i_Event2Status==1) 
                     }//if(data[1]==2)  
                           
                   }// if (data[1] == 1 || data[1] == 2)
                else
                   {
                     printk("\nThe port parameter is in error\n");
                     return -EINVAL;
                    }//else if (data[1] == 1 || data[1] == 2)
                 break;   
      default :printk("\nThe option of START/STOP logic does not exist\n");
               return -EINVAL;
      }//switch(data[0])               

return insn->n;
}

/*
+----------------------------------------------------------------------------+
| Function   Name   : int i_APCI1500_Initialisation                          |
|			  (comedi_device *dev,comedi_subdevice *s,               |
|                      comedi_insn *insn,lsampl_t *data)                     |
+----------------------------------------------------------------------------+
| Task              : Return the status of the digital input                 |
+----------------------------------------------------------------------------+
| Input Parameters  : comedi_device *dev      : Driver handle                |
|		              UINT ui_Channel : Channel number to read       |
|                     lsampl_t *data          : Data Pointer to read status  |
+----------------------------------------------------------------------------+
| Output Parameters :	--													 |
+----------------------------------------------------------------------------+
| Return Value      : TRUE  : No error occur                                 |
|		            : FALSE : Error occur. Return the error          |
|			                                                         |
+----------------------------------------------------------------------------+
*/
INT i_APCI1500_Initialisation(comedi_device *dev,comedi_subdevice *s,comedi_insn *insn,lsampl_t *data)
{
int i_DummyRead=0; 
    /******************/
    /* Software reset */ 
    /******************/
    i_DummyRead=inb(devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
    outb(0,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
    i_DummyRead=inb(devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
    outb(0,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
    outb(1,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
    outb(0,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
	      
 /*****************************************************/
 /* Selects the master configuration control register */
 /*****************************************************/
 outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
 outb(0xF4,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
 
        /*****************************************************/
        /* Selects the mode specification register of port A */
        /*****************************************************/
        outb(APCI1500_RW_PORT_A_SPECIFICATION,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
        outb(0x10,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);

         /* Selects the data path polarity register of port A */
         outb( APCI1500_RW_PORT_A_DATA_PCITCH_POLARITY,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
         /* High level of port A means 1 */
         outb(0xFF,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER); 
       
         /* Selects the data direction register of port A */
          outb(APCI1500_RW_PORT_A_DATA_DIRECTION,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
          /* All bits used as inputs */
         outb(0xFF,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
          /* Selects the command and status register of port A */
         outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
          /* Deletes IP and IUS */ 
         outb(0x20,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
          /*  Selects the command and status register of port A */
        outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
        /* Deactivates the interrupt management of port A:  */
        outb(0xE0,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
        /* Selects the handshake specification register of port A */
        outb(APCI1500_RW_PORT_A_HANDSHAKE_SPECIFICATION,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
        /* Deletes the register */
        outb(0,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);

         /*****************************************************/
         /* Selects the mode specification register of port B */
         /*****************************************************/
         outb(APCI1500_RW_PORT_B_SPECIFICATION,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);
         outb(0x10,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER);