📄 imvc07_a.asm
字号:
; +-----------------+-------------------+-----------+
; | Variables | on Entry | on Exit |
; +-----------------+-------------------+-----------+
; | ACC | xx | T1CON Reg.|
; | DP | xx | DP_EV |
; +-----------------+-------------------+-----------+
;-----------------------------------------------------------------------------
;=============================================================================
.global _start_pwm
_start_pwm:
LDP #DP_EV
SETBIT COMCONA,SETB15 ;enable compare operation
SETBIT COMCONA,SETB9 ;enable compare output pins
SETBIT T1CON,SETB6 ;start GPT1 counter
RET
;=============================================================================
; Routine Name: _ISR_Kernel
; --------------------------
; Description:position,speed¤t loop interrupt routine
; ---------------------------
; Calling Convention: Interrupt Service Routine (no calling);
;=============================================================================
.global _rtc_slow_int
.global _rtc_middle_int
.global _rtc_fast_int
.global _ISR_Kernel
;=============================================================================
_ISR_Kernel:
LDP #DP_EV ; load ev. man. data page pointer
SETBIT EVAIFRA,SETB9 ; reset T2UFINT flag
SETC SXM ; set sign extention mode
LDP #_counter_fast ; load "counter_fast" data page pointer
LACC _counter_fast ; ACC <- _counter_fast
SUB #1 ; ACC <- _counter_fast --
SACL _counter_fast ; save _counter_fast -= 1
BCND fast_int, LEQ ; if (_counter_fast <= 0) fast interrupt
SUB #1 ; ACC <- _counter_fast --
BCND middle_int, NEQ ; if (_counter_fast != 1) middle_int
fast_int: ; fast interrupt label
SPLK #1, _flag_active_fast ; _flag_active_fast = 1
LACC _counter_fast ; ACC <- _counter_fast
ADD _fast_max_count ; ACC <- _counter_fast + _fast_max_count
SACL _counter_fast ; save _counter_fast += _fast_max_count
CLRC INTM ; all unmaskable interrupt are enabled
CALL _rtc_fast_int ; call fast interrupt routine
SETC INTM ; all unmaskable interrupt are disabled
LDP #_flag_active_fast ; load "flag_active_fast" data page pointer
SPLK #0, _flag_active_fast ; _flag_active_fast = 0
middle_int: ; middle interrupt label
LDP #_counter_middle ; load "counter_mniddle" data page pointer
LACC _counter_middle ; ACC <- _counter_middle
SUB #1 ; ACC <- _counter_middle --
SACL _counter_middle ; save _counter_middle -= 1
LACC _flag_active_fast ; ACC <- _flag_active_fast
BCND END_RUT, GT ; if ( _flag_active_middle > 0 )END
LACC _counter_middle ; ACC <- _counter_middle
BCND middle_rtc, LEQ ; if ( _counter_middle - 1 <= 0 )middle rtc
SUB #1 ; ACC <- _counter_middle --
BCND slow_int, NEQ ; if (_counter_fast != 1) slow_int
middle_rtc: ; middle interrupt function label
SPLK #1,_flag_active_middle ; flag_active_middle = 1
LACC _counter_middle ; ACC <- _counter_middle
ADD _middle_max_count ; ACC <- _counter_middle + _middle_max_count
SACL _counter_middle ; save _counter_middle += _middle_max_count
CLRC INTM ; all unmaskable interrupt are enabled
CALL _rtc_middle_int ; call middle interrupt routine
SETC INTM ; all unmaskable interrupt are disabled
LDP #_flag_active_middle ; load flag_active_middle data page pointer
SPLK #0,_flag_active_middle ; flag_active_middle = 0
slow_int: ; slow interrupt label
LDP #_counter_slow ; load "counter_slow" data page pointer
LACC _counter_slow ; ACC <- _counter_slow
SUB #1 ; ACC <- _counter_slow --
SACL _counter_slow ; save _counter_slow -= 1
LACC _flag_active_fast ; ACC <- _flag_active_fast
BCND END_RUT, GT ; if ( _flag_active_fast > 0 )END
LACC _counter_slow ; ACC <- _counter_slow
BCND slow_rtc, LEQ ; if ( _counter_slow - 1 <= 0 )slow rtc
B END_RUT ; else END
slow_rtc: ; slow interrupt function label
SPLK #1,_flag_active_slow ; flag_active_slow = 1
LACC _counter_slow ; ACC <- _counter_slow
ADD _slow_max_count ; ACC <- _counter_slow + _slow_max_count
SACL _counter_slow ; save _counter_slow += _slow_max_count
CLRC INTM ; all unmaskable interrupt are enabled
CALL _rtc_slow_int ; call slow interrupt routine
SETC INTM ; all unmaskable interrupt are disabled
LDP #_flag_active_slow ; load flag_active_slow data page pointer
SPLK #0,_flag_active_slow ; flag_active_slow = 0
END_RUT: ; end routine label
END_ISR ; end of ISR
;=============================================================================
; Routine Name: _loadsatvals
; --------------------------
; Description:saturation level is computed function of the shift value
; --------------------------
; Calling Convention: extern void loadsatvals();
;=============================================================================
.global _loadsatvals
;=============================================================================
_loadsatvals:
SETC SXM
LDP #satvals12
SPLK #satval1, satvals12
SPLK #satval2, satvals12+1
SPLK #satval3, satvals12+2
SPLK #satval4, satvals12+3
SPLK #satval5, satvals12+4
SPLK #satval6, satvals12+5
SPLK #satval7, satvals12+6
SPLK #satval8, satvals12+7
SPLK #satval9, satvals12+8
SPLK #satval10, satvals12+9
SPLK #satval11, satvals12+10
SPLK #satval12, satvals12+11
RET
;=============================================================================
; Routine Name: _sine
; ------------------
; Description:compute the sinus of the position angle; input of the routine is
; position angle theta.
; ------------------
; Calling Convention: extern void sine();
;*****************************************************************************
_sine:
SETC SXM
ldp #temp
mar *-
lacc *+
sacl temp
lt temp
mpy #tabsize
pac
sacl temp1 ; fractional part of place in table in +Q16 format.
RPT #15
SFR
bcnd poz, GEQ
add #tabsize
poz:
add #sintab ;address of lower value in ACC
TBLR temp_lo
ADD #1
TBLR temp_hi
lacc temp1, 14 ;converting +Q16 to Q15
and #0FFFFh, 14
sach temp1, 1
lt temp_hi ; higher value
mpy temp1
lacc #32767
sub temp1 ; acc = 1-temp1
sacl temp1
ltp temp_lo ;lower value
mpy temp1
apac
RPT #14
SFR
ret
;=============================================================================
; Routine Name: _update_field_pos
; ----------------------
; Description : Estimates the rotor field position
; ----------------------
; Calling Convention: extern void update_field_pos();
;=============================================================================
.global _update_field_pos
;=============================================================================
_update_field_pos:
LDP #_omg
SETC OVM ; set overflow protection mode
SETC SXM ; set extended sign mode
SPM 0
LT _omg
MPY _C_omg
PAC ; ACC <- (omg * C_omg)
RPT _Sh_omg
SFL ; ACC <- (omg * C_omg)* (2^Sh_omg)
SACL temp
SACH _theta_inc ; theta_inc = (omg * C_omg)* (2^Sh_omg)
LT _i_q
MPY _C_slip
PAC ; ACC <- [(omg * C_omg)* (2^Sh_omg) + C_slip * i_q]
RPT _Sh_slip
SFL ; ACC <- [(omg * C_omg)* (2^Sh_omg) + C_slip * i_q] * (2^Sh_slip)
CLRC SXM
ADD temp
ADD _theta_low ; ACC <- ACC + theta_low
SETC SXM
ADD _theta_inc,16 ; ACC <- ACC + theta_inc
CLRC OVM
ADD _theta,16 ; ACC <- ACC + theta
SACH _theta ; theta <- theta + ACC
SACL _theta_low ; save low part of theta
CLRC SXM
RET
;=============================================================================
; Routine Name: _cfgiopc1
; ----------------------
; Description : Configures IOPC1 digital line as out pin
; ----------------------
; Calling Convention: extern void cfgiopc1();
;=============================================================================
.global _cfgiopc1
;=============================================================================
_cfgiopc1:
LDP #DP_PF2 ; Peripheral File 2 Data Page Pointer
RESBIT MCRB,RSTB1 ; select IOPC1 pin function
SETBIT PCDATDIR,SETB9 ; set IOPC1 as out pin
RET
;=============================================================================
; Routine Name: _setiopc1
; ----------------------
; Description : set IOPC1 output pin
; ----------------------
; Calling Convention: extern void setiopc1();
;=============================================================================
.global _setiopc1
;=============================================================================
_setiopc1:
LDP #DP_PF2 ; Peripheral File 2 Data Page Pointer
SETBIT PCDATDIR,SETB1 ; set IOPC1
RET
;=============================================================================
; Routine Name: _resetiopc1
; ----------------------
; Description : reset IOPC1 output pin
; ----------------------
; Calling Convention: extern void resetiopc1();
;=============================================================================
.global _resetiopc1
;=============================================================================
_resetiopc1:
LDP #DP_PF2 ; Peripheral File 2 Data Page Pointer
RESBIT PCDATDIR,RSTB1 ; reset IOPC1
RET
;=============================================================================
; Routine Name: get_adc_pair1
; ---------------------------
; Description: Load the conversion results from RESULTx (x=0,1) registers
; ---------------------------
; Calling Convention: extern void get_adc_pair1();
;=============================================================================
A2_SEQ1_BSY .set 01000h ; Bit 12 : SEQ1 Busy
;=============================================================================
.global _get_adc_pair1
;=============================================================================
_get_adc_pair1:
LDP #DP_PF2 ; load PF2 data page pointer
CHK_IA_IB:
LACL ADCTRL2 ; ACC <- ADCTRL2
AND #A2_SEQ1_BSY ; test SEQ1 Busy bit
BCND CHK_IA_IB, NEQ ; if SEQ1 Busy bit not 0 : LOOP
LACC RESULT1 ; ACC <- RESULT1
LDP #_ad_res_0 ; load ad_res_0 data page pointer
SACL _ad_res_0 ; save ad_res_0 = RESULT0
LDP #DP_PF2 ; load PF2 data page pointer
LACC RESULT2 ; ACC <- RESULT2
LDP #_ad_res_1 ; load ad_res_1 data page pointer
SACL _ad_res_1 ; save ad_res_1 = RESULT1
LDP #DP_PF2 ; load PF2 data page pointer
SETBIT ADCTRL2,SETB14 ; reset sequenser
RET ; return
;=============================================================================
;=============================================================================
; Routine Name: _init_pdpint
; ---------------------------
; Description: Initialize PDPINT treatment
; ---------------------------
; Calling Convention: extern void init_pdpint();
;=============================================================================
; +-----------------+-------------------+-----------+
; | Variables | on Entry | on Exit |
; +-----------------+-------------------+-----------+
; | ACC | xx | T1CON Reg.|
; | DP | xx | DP_EV |
; +-----------------+-------------------+-----------+
;-----------------------------------------------------------------------------
.global _init_pdpint
;=============================================================================
_init_pdpint:
LDP #DP_EV
SETBIT EVAIFRA, SETB0
LDP #_pdpint_events ;
SPLK #0, _pdpint_events ; initialize _pdpint_events variable
LACC #_pdpint_rti
LDP #7
SACL pdpintvecA ; load ISR address into corresponding interrupt vector
LDP #DP_EV
SETBIT EVAIMRA,SETB0 ; enable PDPINT (activate power down protection interrupt generation)
LDP #0
SETBIT IMR,SETB1 ; unmask INT2
RET
;=============================================================================
; Routine Name: _pdpint_rti
; ---------------------------
; Description: PDPINT treatment
; ---------------------------
; Calling Convention: No calling
;=============================================================================
AND_COMCON_DPWM .set 07DFFh
;=============================================================================
.global _pdpint_rti
;=============================================================================
_pdpint_rti:
LDP #_pdpint_events
LACL _pdpint_events
ADD #1
SACL _pdpint_events
LDP #DP_EV ; load Event Manager data page pointer
LACC COMCONA ; ACC <- COMCON
AND #AND_COMCON_DPWM ; AND mask to reset Bit15, Bit9
SACL COMCONA ; configure COMCON
LDP #DP_EV
RESBIT EVAIMRA,RSTB0 ; disable PDPINT (dezactivate further PDP interrupts)
; PDPINT may be left enabled but this RTI will be enterred ~100 times
; restore interrupt context
larp AR1 ; ARP=1, AR1=TOS+5
mar *- ; AR1--, AR1=TOS+4
zals *- ; restore ACCL, AR1=TOS+3
addh *- ; restore ACCH, AR1=TOS+2
lst #0, *- ; restore ST0, AR1=TOS+1
lst #1, *- ; restore ST1, AR1=TOS
clrc INTM
RET
;=============================================================================
; Routine Name: _Init_SCSR_WS
; -------------------------
; Description: Initialize SCSR register to ADC & EVM clock enable and
; set 0 Wait-States
; -------------------------
; Calling Convention: extern void Init_SCSR_WS();
;=============================================================================
SCSR1_EN_ADC_EVA .set 00084h ; ADC & EVA clock enable
;=============================================================================
.global _Init_SCSR_WS
;=============================================================================
_Init_SCSR_WS:
LDP #set_WS ; load set_WS data page pointer
SPLK #0, set_WS ; set_WS = 0
OUT set_WS, WSGR ; set 0 Wait-States
NOP
NOP
NOP
NOP
NOP
LDP #DP_PF1 ; load PF1 data page pointer
LACC SCSR1 ; ACC <- SCSR1
OR #SCSR1_EN_ADC_EVA ; ACC <- SCSR1 || SCSR1_EN_ADC_EVA
SACL SCSR1 ; save SCSR1
RET ; return
;=============================================================================
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -