📄 ini2407.h
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/*****************************************************************************************************
File Name : ini2407.h
Project : IMVC position control on ACPM750 AC Power Module Kit with TMS320LF2407 DSP controller
======================================================================================================
Target Sys : MSK2407 DSP board + ACPM750 v3.2 power module
Description : Definition of specific hardware-related parameters for the
TMS320LF2407 DSP controller, related to the application settings
Originator/s: Technosoft Ltd.
Status : OK
======================================================================================================
Copyright ?2000 Technosoft
======================================================================================================*/
#ifndef __ini2407
#define __ini2407
#define GPTCON_INI 0xE000 /* default value after reset */
#define T1CON_INI_0 0x0000 /* default value after reset */
#define T2CON_INI_0 0x0000 /* default value after reset */
#define GPTCON_PWM_OR_MASK 0x0080 /* OR mask for enabling ADC start on GPT1 */
#define GPTCON_PWM_AND_MASK 0xFFEF /* AND mask for enabling ADC start on GPT1 Underflow Event */
#define SYM_PWM_PER 0x02EE /* setup pwm frequency 20KHz */
#define T1COUNT_INI 0x0000 /* TIMER1 period counting initialisation */
#define DBTCON_INI 0x0AE4 /* dead time setup */
#define ACTIVE_HI_LOW 0x0666 /* power switch module configuration */
#define COMPR1_INI 0x0177 /* setup the initial value for the COMPRx */
#define COMPR2_INI 0x0177 /*(x=1,2,3)register; SYM_PWM_PER/2 */
#define COMPR3_INI 0x0177
#define T1CON_INI 0x0800 /* continous up/down count mode */
/* GP TIMER 1 register configuration */
#define COMCON_INI 0x0000 /* enable pwm mode */
#define MCRA_ENC_OR_MASK 0x0018 /* CAPx/QEPx (x=1,2) pins configured for QEP */
#define MCRA_PWM_OR_MASK 0x0FDB /* MCRA configured for PWM */
#define GPTCON_ENC_AND_MASK 0xE7FF /* AND mask for disabling ADC start on GPT2 */
#define T2PR_INI 0xFFFF /* TIMER2 period counting initialisation */
#define T2COUNT_INI 0x0000 /* counter register configuration */
#define T2CON_INI 0x1830 /* GP TIMER 2 configuration to be used for QEP */
#define GPTCON_INT_PS_AND_MASK 0xF9FF /* AND mask for disabling ADC start on GPT2 */
#define ADCTRL1_RESET_ADC 0x4000 /* Reset ADC module */
#define ADCTRL1_INI 0x3020 /* configuration ADCTRL1 register (prescaler 1) */
#define ADCTRL2_INI 0x0100 /* configuration ADCTRL2 register */
#define MAX_CONV_INI 0x0002 /* 3 autoconversions */
#define CHSELSEQ1_INI 0x0566 /* ia crt. measured on ADCIN06, ib crt. measured on ADCIN05 */
#define CHSELSEQ2_INI 0x0000 /* */
#define CHSELSEQ3_INI 0x0000 /* */
#define CHSELSEQ4_INI 0x0000 /* */
#define IMRA_INI 0x0201 /* enable GPT1 timer underflow and PDP interrupts */
#define IMR_INI 0x0012 /* unmask INT2 and INT5 */
#endif /* of ifdef __ini2407 */
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