hdb3decoder.tan.qmsg

基于VHDL语言的HDB3码编译码器的设计 HDB3 码的全称是三阶高密度双极性码

{ "Info" "ITDB_TSU_RESULT" "NEG_IN_TMP NEG_IN CLK 4.247 ns register " "Info: tsu for register \"NEG_IN_TMP\" (data pin = \"NEG_IN\", clock pin = \"CLK\") is 4.247 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.940 ns + Longest pin register " "Info: + Longest pin to register delay is 6.940 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns NEG_IN 1 PIN PIN_33 1 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_33; Fanout = 1; PIN Node = 'NEG_IN'" {  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "" { NEG_IN } "NODE_NAME" } "" } } { "HDB3DECODER.vhd" "" { Text "F:/altera/hdb3decoder/HDB3DECODER.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(5.356 ns) + CELL(0.115 ns) 6.940 ns NEG_IN_TMP 2 REG LC_X2_Y3_N4 6 " "Info: 2: + IC(5.356 ns) + CELL(0.115 ns) = 6.940 ns; Loc. = LC_X2_Y3_N4; Fanout = 6; REG Node = 'NEG_IN_TMP'" {  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "5.471 ns" { NEG_IN NEG_IN_TMP } "NODE_NAME" } "" } } { "HDB3DECODER.vhd" "" { Text "F:/altera/hdb3decoder/HDB3DECODER.vhd" 48 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.584 ns 22.82 % " "Info: Total cell delay = 1.584 ns ( 22.82 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.356 ns 77.18 % " "Info: Total interconnect delay = 5.356 ns ( 77.18 % )" {  } {  } 0}  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "6.940 ns" { NEG_IN NEG_IN_TMP } "NODE_NAME" } "" } } { "f:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus42/bin/Technology_Viewer.qrui" "6.940 ns" { NEG_IN NEG_IN~out0 NEG_IN_TMP } { 0.000ns 0.000ns 5.356ns } { 0.000ns 1.469ns 0.115ns } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "HDB3DECODER.vhd" "" { Text "F:/altera/hdb3decoder/HDB3DECODER.vhd" 48 -1 0 } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 2.730 ns - Shortest register " "Info: - Shortest clock path from clock \"CLK\" to destination register is 2.730 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK 1 CLK PIN_17 9 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_17; Fanout = 9; CLK Node = 'CLK'" {  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "" { CLK } "NODE_NAME" } "" } } { "HDB3DECODER.vhd" "" { Text "F:/altera/hdb3decoder/HDB3DECODER.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.550 ns) + CELL(0.711 ns) 2.730 ns NEG_IN_TMP 2 REG LC_X2_Y3_N4 6 " "Info: 2: + IC(0.550 ns) + CELL(0.711 ns) = 2.730 ns; Loc. = LC_X2_Y3_N4; Fanout = 6; REG Node = 'NEG_IN_TMP'" {  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "1.261 ns" { CLK NEG_IN_TMP } "NODE_NAME" } "" } } { "HDB3DECODER.vhd" "" { Text "F:/altera/hdb3decoder/HDB3DECODER.vhd" 48 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 79.85 % " "Info: Total cell delay = 2.180 ns ( 79.85 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.550 ns 20.15 % " "Info: Total interconnect delay = 0.550 ns ( 20.15 % )" {  } {  } 0}  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "2.730 ns" { CLK NEG_IN_TMP } "NODE_NAME" } "" } } { "f:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus42/bin/Technology_Viewer.qrui" "2.730 ns" { CLK CLK~out0 NEG_IN_TMP } { 0.000ns 0.000ns 0.550ns } { 0.000ns 1.469ns 0.711ns } } }  } 0}  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "6.940 ns" { NEG_IN NEG_IN_TMP } "NODE_NAME" } "" } } { "f:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus42/bin/Technology_Viewer.qrui" "6.940 ns" { NEG_IN NEG_IN~out0 NEG_IN_TMP } { 0.000ns 0.000ns 5.356ns } { 0.000ns 1.469ns 0.115ns } } } { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "2.730 ns" { CLK NEG_IN_TMP } "NODE_NAME" } "" } } { "f:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus42/bin/Technology_Viewer.qrui" "2.730 ns" { CLK CLK~out0 NEG_IN_TMP } { 0.000ns 0.000ns 0.550ns } { 0.000ns 1.469ns 0.711ns } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "CLK NRZ NRZ~reg0 6.225 ns register " "Info: tco from clock \"CLK\" to destination pin \"NRZ\" through register \"NRZ~reg0\" is 6.225 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK source 2.730 ns + Longest register " "Info: + Longest clock path from clock \"CLK\" to source register is 2.730 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK 1 CLK PIN_17 9 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_17; Fanout = 9; CLK Node = 'CLK'" {  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "" { CLK } "NODE_NAME" } "" } } { "HDB3DECODER.vhd" "" { Text "F:/altera/hdb3decoder/HDB3DECODER.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.550 ns) + CELL(0.711 ns) 2.730 ns NRZ~reg0 2 REG LC_X1_Y3_N8 1 " "Info: 2: + IC(0.550 ns) + CELL(0.711 ns) = 2.730 ns; Loc. = LC_X1_Y3_N8; Fanout = 1; REG Node = 'NRZ~reg0'" {  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "1.261 ns" { CLK NRZ~reg0 } "NODE_NAME" } "" } } { "HDB3DECODER.vhd" "" { Text "F:/altera/hdb3decoder/HDB3DECODER.vhd" 48 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 79.85 % " "Info: Total cell delay = 2.180 ns ( 79.85 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.550 ns 20.15 % " "Info: Total interconnect delay = 0.550 ns ( 20.15 % )" {  } {  } 0}  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "2.730 ns" { CLK NRZ~reg0 } "NODE_NAME" } "" } } { "f:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus42/bin/Technology_Viewer.qrui" "2.730 ns" { CLK CLK~out0 NRZ~reg0 } { 0.000ns 0.000ns 0.550ns } { 0.000ns 1.469ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "HDB3DECODER.vhd" "" { Text "F:/altera/hdb3decoder/HDB3DECODER.vhd" 48 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "3.271 ns + Longest register pin " "Info: + Longest register to pin delay is 3.271 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns NRZ~reg0 1 REG LC_X1_Y3_N8 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X1_Y3_N8; Fanout = 1; REG Node = 'NRZ~reg0'" {  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "" { NRZ~reg0 } "NODE_NAME" } "" } } { "HDB3DECODER.vhd" "" { Text "F:/altera/hdb3decoder/HDB3DECODER.vhd" 48 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.147 ns) + CELL(2.124 ns) 3.271 ns NRZ 2 PIN PIN_31 0 " "Info: 2: + IC(1.147 ns) + CELL(2.124 ns) = 3.271 ns; Loc. = PIN_31; Fanout = 0; PIN Node = 'NRZ'" {  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "3.271 ns" { NRZ~reg0 NRZ } "NODE_NAME" } "" } } { "HDB3DECODER.vhd" "" { Text "F:/altera/hdb3decoder/HDB3DECODER.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.124 ns 64.93 % " "Info: Total cell delay = 2.124 ns ( 64.93 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.147 ns 35.07 % " "Info: Total interconnect delay = 1.147 ns ( 35.07 % )" {  } {  } 0}  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "3.271 ns" { NRZ~reg0 NRZ } "NODE_NAME" } "" } } { "f:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus42/bin/Technology_Viewer.qrui" "3.271 ns" { NRZ~reg0 NRZ } { 0.000ns 1.147ns } { 0.000ns 2.124ns } } }  } 0}  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "2.730 ns" { CLK NRZ~reg0 } "NODE_NAME" } "" } } { "f:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus42/bin/Technology_Viewer.qrui" "2.730 ns" { CLK CLK~out0 NRZ~reg0 } { 0.000ns 0.000ns 0.550ns } { 0.000ns 1.469ns 0.711ns } } } { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "3.271 ns" { NRZ~reg0 NRZ } "NODE_NAME" } "" } } { "f:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus42/bin/Technology_Viewer.qrui" "3.271 ns" { NRZ~reg0 NRZ } { 0.000ns 1.147ns } { 0.000ns 2.124ns } } }  } 0}
{ "Info" "ITDB_TH_RESULT" "POS_IN_TMP POS_IN CLK -3.804 ns register " "Info: th for register \"POS_IN_TMP\" (data pin = \"POS_IN\", clock pin = \"CLK\") is -3.804 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 2.730 ns + Longest register " "Info: + Longest clock path from clock \"CLK\" to destination register is 2.730 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK 1 CLK PIN_17 9 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_17; Fanout = 9; CLK Node = 'CLK'" {  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "" { CLK } "NODE_NAME" } "" } } { "HDB3DECODER.vhd" "" { Text "F:/altera/hdb3decoder/HDB3DECODER.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.550 ns) + CELL(0.711 ns) 2.730 ns POS_IN_TMP 2 REG LC_X2_Y3_N5 6 " "Info: 2: + IC(0.550 ns) + CELL(0.711 ns) = 2.730 ns; Loc. = LC_X2_Y3_N5; Fanout = 6; REG Node = 'POS_IN_TMP'" {  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "1.261 ns" { CLK POS_IN_TMP } "NODE_NAME" } "" } } { "HDB3DECODER.vhd" "" { Text "F:/altera/hdb3decoder/HDB3DECODER.vhd" 48 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 79.85 % " "Info: Total cell delay = 2.180 ns ( 79.85 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.550 ns 20.15 % " "Info: Total interconnect delay = 0.550 ns ( 20.15 % )" {  } {  } 0}  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "2.730 ns" { CLK POS_IN_TMP } "NODE_NAME" } "" } } { "f:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus42/bin/Technology_Viewer.qrui" "2.730 ns" { CLK CLK~out0 POS_IN_TMP } { 0.000ns 0.000ns 0.550ns } { 0.000ns 1.469ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TH_DELAY" "0.015 ns + " "Info: + Micro hold delay of destination is 0.015 ns" {  } { { "HDB3DECODER.vhd" "" { Text "F:/altera/hdb3decoder/HDB3DECODER.vhd" 48 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.549 ns - Shortest pin register " "Info: - Shortest pin to register delay is 6.549 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns POS_IN 1 PIN PIN_32 1 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_32; Fanout = 1; PIN Node = 'POS_IN'" {  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "" { POS_IN } "NODE_NAME" } "" } } { "HDB3DECODER.vhd" "" { Text "F:/altera/hdb3decoder/HDB3DECODER.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.965 ns) + CELL(0.115 ns) 6.549 ns POS_IN_TMP 2 REG LC_X2_Y3_N5 6 " "Info: 2: + IC(4.965 ns) + CELL(0.115 ns) = 6.549 ns; Loc. = LC_X2_Y3_N5; Fanout = 6; REG Node = 'POS_IN_TMP'" {  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "5.080 ns" { POS_IN POS_IN_TMP } "NODE_NAME" } "" } } { "HDB3DECODER.vhd" "" { Text "F:/altera/hdb3decoder/HDB3DECODER.vhd" 48 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.584 ns 24.19 % " "Info: Total cell delay = 1.584 ns ( 24.19 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.965 ns 75.81 % " "Info: Total interconnect delay = 4.965 ns ( 75.81 % )" {  } {  } 0}  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "6.549 ns" { POS_IN POS_IN_TMP } "NODE_NAME" } "" } } { "f:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus42/bin/Technology_Viewer.qrui" "6.549 ns" { POS_IN POS_IN~out0 POS_IN_TMP } { 0.000ns 0.000ns 4.965ns } { 0.000ns 1.469ns 0.115ns } } }  } 0}  } { { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "2.730 ns" { CLK POS_IN_TMP } "NODE_NAME" } "" } } { "f:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus42/bin/Technology_Viewer.qrui" "2.730 ns" { CLK CLK~out0 POS_IN_TMP } { 0.000ns 0.000ns 0.550ns } { 0.000ns 1.469ns 0.711ns } } } { "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" "" { Report "F:/altera/hdb3decoder/db/HDB3DECODER_cmp.qrpt" Compiler "HDB3DECODER" "UNKNOWN" "V1" "F:/altera/hdb3decoder/db/HDB3DECODER.quartus_db" { Floorplan "F:/altera/hdb3decoder/" "" "6.549 ns" { POS_IN POS_IN_TMP } "NODE_NAME" } "" } } { "f:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "f:/altera/quartus42/bin/Technology_Viewer.qrui" "6.549 ns" { POS_IN POS_IN~out0 POS_IN_TMP } { 0.000ns 0.000ns 4.965ns } { 0.000ns 1.469ns 0.115ns } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 1  " "Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Fri Jul 15 01:36:02 2005 " "Info: Processing ended: Fri Jul 15 01:36:02 2005" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0}  } {  } 0}