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📄 video1394.c

📁 这个是uClinux下的ieee1394驱动
💻 C
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/* * video1394.c - video driver for OHCI 1394 boards * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au> *                        Peter Schlaile <udbz@rz.uni-karlsruhe.de> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software Foundation, * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *//* jds -- add private data to file to keep track of iso contexts associated   with each open -- so release won't kill all iso transfers */#include <linux/config.h>#include <linux/kernel.h>#include <linux/list.h>#include <linux/slab.h>#include <linux/interrupt.h>#include <linux/wait.h>#include <linux/errno.h>#include <linux/module.h>#include <linux/init.h>#include <linux/pci.h>#include <linux/fs.h>#include <linux/poll.h>#include <linux/smp_lock.h>#include <linux/proc_fs.h>#include <linux/tqueue.h>#include <linux/delay.h>#include <linux/devfs_fs_kernel.h>#include <asm/bitops.h>#include <linux/types.h>#include <linux/wrapper.h>#include <linux/vmalloc.h>#include <linux/timex.h>#include <linux/mm.h>#include "ieee1394.h"#include "ieee1394_types.h"#include "hosts.h"#include "ieee1394_core.h"#include "highlevel.h"#include "video1394.h"#include "ohci1394.h"#define ISO_CHANNELS 64#ifndef virt_to_page#define virt_to_page(x) MAP_NR(x)#endif#ifndef vmalloc_32#define vmalloc_32(x) vmalloc(x)#endif#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,3))#define remap_page_range_1394(vma, start, addr, size, prot) \	remap_page_range(start, addr, size, prot)#else#define remap_page_range_1394(vma, start, addr, size, prot) \	remap_page_range(vma, start, addr, size, prot)#endifstruct it_dma_prg {	struct dma_cmd begin;	quadlet_t data[4];	struct dma_cmd end;	quadlet_t pad[4]; /* FIXME: quick hack for memory alignment */};struct dma_iso_ctx {	struct ti_ohci *ohci;	int type; /* OHCI_ISO_TRANSMIT or OHCI_ISO_RECEIVE */	struct ohci1394_iso_tasklet iso_tasklet;	int channel;	int ctx;	int last_buffer;	int * next_buffer;  /* For ISO Transmit of video packets			       to write the correct SYT field			       into the next block */	unsigned int num_desc;	unsigned int buf_size;	unsigned int frame_size;	unsigned int packet_size;	unsigned int left_size;	unsigned int nb_cmd;	unsigned char *buf;        struct dma_cmd **ir_prg;	struct it_dma_prg **it_prg;	unsigned int *buffer_status;        struct timeval *buffer_time; /* time when the buffer was received */	unsigned int *last_used_cmd; /* For ISO Transmit with 					variable sized packets only ! */	int ctrlClear;	int ctrlSet;	int cmdPtr;	int ctxMatch;	wait_queue_head_t waitq;	spinlock_t lock;	unsigned int syt_offset;	int flags;	struct list_head link;};struct video_card {	struct ti_ohci *ohci;	struct list_head list;	int id;	devfs_handle_t devfs;};struct file_ctx {	struct video_card *video;	struct list_head context_list;	struct dma_iso_ctx *current_ctx;};#ifdef CONFIG_IEEE1394_VERBOSEDEBUG#define VIDEO1394_DEBUG#endif#ifdef DBGMSG#undef DBGMSG#endif#ifdef VIDEO1394_DEBUG#define DBGMSG(card, fmt, args...) \printk(KERN_INFO "video1394_%d: " fmt "\n" , card , ## args)#else#define DBGMSG(card, fmt, args...)#endif/* print general (card independent) information */#define PRINT_G(level, fmt, args...) \printk(level "video1394: " fmt "\n" , ## args)/* print card specific information */#define PRINT(level, card, fmt, args...) \printk(level "video1394_%d: " fmt "\n" , card , ## args)void wakeup_dma_ir_ctx(unsigned long l);void wakeup_dma_it_ctx(unsigned long l);static LIST_HEAD(video1394_cards);static spinlock_t video1394_cards_lock = SPIN_LOCK_UNLOCKED;static devfs_handle_t devfs_handle;static struct hpsb_highlevel *hl_handle = NULL;/* Code taken from bttv.c *//*******************************//* Memory management functions *//*******************************/static inline unsigned long kvirt_to_bus(unsigned long adr) {	unsigned long kva, ret;	kva = (unsigned long) page_address(vmalloc_to_page((void *)adr));	kva |= adr & (PAGE_SIZE-1); /* restore the offset */	ret = virt_to_bus((void *)kva);	return ret;}/* Here we want the physical address of the memory. * This is used when initializing the contents of the area. */static inline unsigned long kvirt_to_pa(unsigned long adr) {        unsigned long kva, ret;	kva = (unsigned long) page_address(vmalloc_to_page((void *)adr));	kva |= adr & (PAGE_SIZE-1); /* restore the offset */	ret = __pa(kva);        return ret;}static void * rvmalloc(unsigned long size){	void * mem;	unsigned long adr;	size=PAGE_ALIGN(size);	mem=vmalloc_32(size);	if (mem) 	{		memset(mem, 0, size); /* Clear the ram out, 					 no junk to the user */	        adr=(unsigned long) mem;		while (size > 0)                 {			mem_map_reserve(vmalloc_to_page((void *)adr));			adr+=PAGE_SIZE;			size-=PAGE_SIZE;		}	}	return mem;}static void rvfree(void * mem, unsigned long size){        unsigned long adr;	if (mem) 	{	        adr=(unsigned long) mem;		while ((long) size > 0)                 {			mem_map_unreserve(vmalloc_to_page((void *)adr));			adr+=PAGE_SIZE;			size-=PAGE_SIZE;		}		vfree(mem);	}}/* End of code taken from bttv.c */static int free_dma_iso_ctx(struct dma_iso_ctx *d){	int i;		DBGMSG(d->ohci->id, "Freeing dma_iso_ctx %d", d->ctx);	ohci1394_stop_context(d->ohci, d->ctrlClear, NULL);	if (d->iso_tasklet.link.next != NULL)		ohci1394_unregister_iso_tasklet(d->ohci, &d->iso_tasklet);	if (d->buf)		rvfree((void *)d->buf, d->num_desc * d->buf_size);	if (d->ir_prg) {		for (i=0;i<d->num_desc;i++) 			if (d->ir_prg[i]) kfree(d->ir_prg[i]);		kfree(d->ir_prg);	}	if (d->it_prg) {		for (i=0;i<d->num_desc;i++) 			if (d->it_prg[i]) kfree(d->it_prg[i]);		kfree(d->it_prg);	}	if (d->buffer_status)		kfree(d->buffer_status);	if (d->buffer_time)		kfree(d->buffer_time);	if (d->last_used_cmd)		kfree(d->last_used_cmd);	if (d->next_buffer)		kfree(d->next_buffer);	list_del(&d->link);	kfree(d);	return 0;}static struct dma_iso_ctx *alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,		  int buf_size, int channel, unsigned int packet_size){	struct dma_iso_ctx *d;	int i;	d = kmalloc(sizeof(struct dma_iso_ctx), GFP_KERNEL);	if (d == NULL) {		PRINT(KERN_ERR, ohci->id, "Failed to allocate dma_iso_ctx");		return NULL;	}	memset(d, 0, sizeof *d);	d->ohci = ohci;	d->type = type;	d->channel = channel;	d->num_desc = num_desc;	d->frame_size = buf_size;	d->buf_size = PAGE_ALIGN(buf_size);	d->last_buffer = -1;	d->buf = NULL;	d->ir_prg = NULL;	init_waitqueue_head(&d->waitq);	d->buf = rvmalloc(d->num_desc * d->buf_size);	if (d->buf == NULL) {		PRINT(KERN_ERR, ohci->id, "Failed to allocate dma buffer");		free_dma_iso_ctx(d);		return NULL;	}	memset(d->buf, 0, d->num_desc * d->buf_size);	if (type == OHCI_ISO_RECEIVE)		ohci1394_init_iso_tasklet(&d->iso_tasklet, type,					  wakeup_dma_ir_ctx,					  (unsigned long) d);	else		ohci1394_init_iso_tasklet(&d->iso_tasklet, type,					  wakeup_dma_it_ctx,					  (unsigned long) d);	if (ohci1394_register_iso_tasklet(ohci, &d->iso_tasklet) < 0) {		PRINT(KERN_ERR, ohci->id, "no free iso %s contexts",		      type == OHCI_ISO_RECEIVE ? "receive" : "transmit");		free_dma_iso_ctx(d);		return NULL;	}	d->ctx = d->iso_tasklet.context;	if (type == OHCI_ISO_RECEIVE) {		d->ctrlSet = OHCI1394_IsoRcvContextControlSet+32*d->ctx;		d->ctrlClear = OHCI1394_IsoRcvContextControlClear+32*d->ctx;		d->cmdPtr = OHCI1394_IsoRcvCommandPtr+32*d->ctx;		d->ctxMatch = OHCI1394_IsoRcvContextMatch+32*d->ctx;		d->ir_prg = kmalloc(d->num_desc * sizeof(struct dma_cmd *), 				    GFP_KERNEL);		if (d->ir_prg == NULL) {			PRINT(KERN_ERR, ohci->id, 			      "Failed to allocate dma ir prg");			free_dma_iso_ctx(d);			return NULL;		}		memset(d->ir_prg, 0, d->num_desc * sizeof(struct dma_cmd *));			d->nb_cmd = d->buf_size / PAGE_SIZE + 1;		d->left_size = (d->frame_size % PAGE_SIZE) ?			d->frame_size % PAGE_SIZE : PAGE_SIZE; 		for (i=0;i<d->num_desc;i++) {			d->ir_prg[i] = kmalloc(d->nb_cmd * 					       sizeof(struct dma_cmd), 					       GFP_KERNEL);			if (d->ir_prg[i] == NULL) {				PRINT(KERN_ERR, ohci->id, 				      "Failed to allocate dma ir prg");				free_dma_iso_ctx(d);				return NULL;			}		}	}	else {  /* OHCI_ISO_TRANSMIT */		d->ctrlSet = OHCI1394_IsoXmitContextControlSet+16*d->ctx;		d->ctrlClear = OHCI1394_IsoXmitContextControlClear+16*d->ctx;		d->cmdPtr = OHCI1394_IsoXmitCommandPtr+16*d->ctx;		d->it_prg = kmalloc(d->num_desc * sizeof(struct it_dma_prg *), 				    GFP_KERNEL);		if (d->it_prg == NULL) {			PRINT(KERN_ERR, ohci->id, 			      "Failed to allocate dma it prg");			free_dma_iso_ctx(d);			return NULL;		}		memset(d->it_prg, 0, d->num_desc*sizeof(struct it_dma_prg *));				d->packet_size = packet_size;		if (PAGE_SIZE % packet_size || packet_size>4096) {			PRINT(KERN_ERR, ohci->id, 			      "Packet size %d (page_size: %ld) "			      "not yet supported\n",			      packet_size, PAGE_SIZE);			free_dma_iso_ctx(d);			return NULL;		}		d->nb_cmd = d->frame_size / d->packet_size;		if (d->frame_size % d->packet_size) {			d->nb_cmd++;			d->left_size = d->frame_size % d->packet_size;		}		else			d->left_size = d->packet_size;		for (i=0;i<d->num_desc;i++) {			d->it_prg[i] = kmalloc(d->nb_cmd * 					       sizeof(struct it_dma_prg), 					       GFP_KERNEL);			if (d->it_prg[i] == NULL) {				PRINT(KERN_ERR, ohci->id, 				      "Failed to allocate dma it prg");				free_dma_iso_ctx(d);				return NULL;			}		}	}	d->buffer_status = kmalloc(d->num_desc * sizeof(unsigned int),				   GFP_KERNEL);	d->buffer_time = kmalloc(d->num_desc * sizeof(struct timeval),				   GFP_KERNEL);	d->last_used_cmd = kmalloc(d->num_desc * sizeof(unsigned int),				   GFP_KERNEL);	d->next_buffer = kmalloc(d->num_desc * sizeof(int),				 GFP_KERNEL);	if (d->buffer_status == NULL) {		PRINT(KERN_ERR, ohci->id, "Failed to allocate buffer_status");		free_dma_iso_ctx(d);		return NULL;	}	if (d->buffer_time == NULL) {		PRINT(KERN_ERR, ohci->id, "Failed to allocate buffer_time");		free_dma_iso_ctx(d);		return NULL;	}	if (d->last_used_cmd == NULL) {		PRINT(KERN_ERR, ohci->id, "Failed to allocate last_used_cmd");		free_dma_iso_ctx(d);		return NULL;	}	if (d->next_buffer == NULL) {		PRINT(KERN_ERR, ohci->id, "Failed to allocate next_buffer");		free_dma_iso_ctx(d);		return NULL;	}	memset(d->buffer_status, 0, d->num_desc * sizeof(unsigned int));	memset(d->buffer_time, 0, d->num_desc * sizeof(struct timeval));	memset(d->last_used_cmd, 0, d->num_desc * sizeof(unsigned int));	memset(d->next_buffer, -1, d->num_desc * sizeof(int));	        spin_lock_init(&d->lock);	PRINT(KERN_INFO, ohci->id, "Iso %s DMA: %d buffers "	      "of size %d allocated for a frame size %d, each with %d prgs",	      (type == OHCI_ISO_RECEIVE) ? "receive" : "transmit",	      d->num_desc, d->buf_size, d->frame_size, d->nb_cmd);	return d;}static void reset_ir_status(struct dma_iso_ctx *d, int n){	int i;	d->ir_prg[n][0].status = cpu_to_le32(4);	d->ir_prg[n][1].status = cpu_to_le32(PAGE_SIZE-4);	for (i=2;i<d->nb_cmd-1;i++)		d->ir_prg[n][i].status = cpu_to_le32(PAGE_SIZE);	d->ir_prg[n][i].status = cpu_to_le32(d->left_size);}static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags){	struct dma_cmd *ir_prg = d->ir_prg[n];	unsigned long buf = (unsigned long)d->buf+n*d->buf_size;	int i;	/* the first descriptor will read only 4 bytes */	ir_prg[0].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |		DMA_CTL_BRANCH | 4);	/* set the sync flag */	if (flags & VIDEO1394_SYNC_FRAMES)		ir_prg[0].control |= cpu_to_le32(DMA_CTL_WAIT);	ir_prg[0].address = cpu_to_le32(kvirt_to_bus(buf));	ir_prg[0].branchAddress =  cpu_to_le32((virt_to_bus(&(ir_prg[1].control)) 				    & 0xfffffff0) | 0x1);	/* the second descriptor will read PAGE_SIZE-4 bytes */	ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |		DMA_CTL_BRANCH | (PAGE_SIZE-4));	ir_prg[1].address = cpu_to_le32(kvirt_to_bus(buf+4));	ir_prg[1].branchAddress =  cpu_to_le32((virt_to_bus(&(ir_prg[2].control)) 				    & 0xfffffff0) | 0x1);		for (i=2;i<d->nb_cmd-1;i++) {		ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE | 			DMA_CTL_BRANCH | PAGE_SIZE);		ir_prg[i].address = cpu_to_le32(kvirt_to_bus(buf+(i-1)*PAGE_SIZE));		ir_prg[i].branchAddress =  			cpu_to_le32((virt_to_bus(&(ir_prg[i+1].control)) 

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