ohcihcd.c

RDC R2886 USB Ehci ohc测试源码,paradigm c++上运行测试

// USB Host Controller OHCI test pattern file
// 08/25/2003    Jeff

#include <systypes.h>					/* Paradigm C++ standard types */
#include <stdio.h>
#include <dos.h>
#include <alloc.h>
#include <embedded.h>
#include <string.h>
#include <conio.h>
#include "..\Include\USBHost.h"
#include "..\Include\USBOHCI.h"

extern ohci_registers __far *ohci_regs;
extern ohci_hcca_desc __far *ohci_hcca;
extern ohci_ed_t __far *ohci_Ep0;
extern ohci_td_t __far *ohci_Ctl_TD0;
extern ohci_td_t __far *ohci_Ctl_TD1;
extern ohci_td_t __far *ohci_Ctl_TD2;
extern ohci_td_t __far *ohci_Ctl_TD3;

extern setup_format __far *Ctl_Setup;
extern char __far *Ctl_Data;

extern std_dev_des __far *dev_des;
extern std_cfg_des __far *cfg_des;
extern std_if_des  __far *if_des;
extern std_edp_des __far *edp_des1;
extern std_edp_des __far *edp_des2;
extern char *String;
extern char LANGID[4];
extern char String2[256];
extern char String3[256];

extern std_dev_des __far *UDisk_dev_des;
extern std_cfg_des __far *UDisk_cfg_des;
extern std_if_des  __far *UDisk_if_des;
extern std_edp_des __far *UDisk_edp_des1;
extern std_edp_des __far *UDisk_edp_des2;
extern char *UDisk_String;

extern BOOL DoneHeadClear;
extern u8 g_OHCIAttach;
extern u16 TD_Status;

extern ohci_td_t __far *ohci_CBW_TD;
extern ohci_td_t __far *ohci_CSW_TD;
extern ohci_td_t __far *ohci_DataOut_TD;
extern ohci_td_t __far *ohci_DataIn_TD;

extern int ControlCnt;

/* +++++++++++++++++++++ USBLib.c +++++++++++++++++++++++++ */
unsigned int UpperAddr (void far *p);
unsigned int LowerAddr (void far *p);
void DWordWrite(void far *p, u32 data);
void DWordWriteHL(void far *p, u16 dataH, u16 dataL);
u32 DWordRead(void far *p);
void mdelay(u16 ms);

/* +++++++++++++++++++++ USBUART.c +++++++++++++++++++++++++ */
void UART_Device_Descriptor(std_dev_des __far *p);
void UART_Configuration_Descriptor(std_cfg_des __far *p);
void UART_Interface_Descriptor(std_if_des __far *p);
void UART_Endpoint_Descriptor(std_edp_des __far *p, int num);
void UART_String_Descriptor(char *p, int string_num, int size);
void UART_SendData(char* buf, int size);

void InsertEmptyTD(ohci_ed_t __far *ed, ohci_td_t __far *td)
{
	char __far *Host_memory_ptr;

	//Allocate TD format structure
	Host_memory_ptr = (char *)malloc(sizeof(ohci_td_t)+16);	//sizeof ohci_ed_t + 16
	Host_memory_ptr = (char *) (((unsigned long)Host_memory_ptr + 0xF) & ~0xF);

	td = (ohci_td_t *) Host_memory_ptr;
	
	td->hwINFO = 0;
	td->hwCBP = 0;
	td->hwNextTD = 0;
	td->hwBE = 0;
	
	ed->hwTailP = ed->hwHeadP = (UpperAddr(td) << 16) + LowerAddr(td);
}

void AddingTDtoED(ohci_ed_t __far *ed, ohci_td_t __far *td)
{
	u32 Temp;
	
	td->hwNextTD = ed->hwHeadP;
	ed->hwHeadP &= 0x0F;
	ed->hwHeadP |= (UpperAddr(td) << 16) + LowerAddr(td);
	
	DoneHeadClear = FALSE;

	if((td == ohci_CBW_TD) || (ohci_CSW_TD) || (ohci_DataIn_TD) || (ohci_DataOut_TD))
	{
		if(td == ohci_CBW_TD)
			TD_Status |= St_CBW_TD;
		else if(td == ohci_CSW_TD)
			TD_Status |= St_CSW_TD;
		else if(td == ohci_DataIn_TD)
			TD_Status |= St_DataIn_TD;
		else if(td == ohci_DataOut_TD)
			TD_Status |= St_DataOut_TD;
		
		//Set Control_Filled
		Temp = ohci_regs->cmdstatus | OHCI_BLF;
		DWordWrite(&ohci_regs->cmdstatus, Temp);
	
		do{} while(TD_Status != 0);
	}
}

void InitOHCIEndPoint0(void)
{
	char __far *Host_memory_ptr;

	//Allocate TD format structure
	Host_memory_ptr = (char *)malloc(sizeof(ohci_ed_t)+16);	//sizeof ohci_ed_t + 16
	Host_memory_ptr = (char *) (((unsigned long)Host_memory_ptr + 0xF) & ~0xF);

	ohci_Ep0 = (ohci_ed_t *) Host_memory_ptr;
	
	ohci_Ep0->hwINFO = 0x00080000L|ED_D_TD|ED_EN_0|ED_FA_0;
	ohci_Ep0->hwTailP = 0;
	ohci_Ep0->hwHeadP = 0;
	ohci_Ep0->hwNextED = 0;
	
	InsertEmptyTD(ohci_Ep0, ohci_Ctl_TD0);
	
	DWordWriteHL(&ohci_regs->ed_controlhead, UpperAddr(ohci_Ep0), LowerAddr(ohci_Ep0));
}

void InitOHCIControl3TD(void)
{
	char __far *Host_memory_ptr;
	
	//Allocate TD format structure
	Host_memory_ptr = (char *)malloc(sizeof(ohci_td_t)+16);	//sizeof ohci_ed_t + 16
	Host_memory_ptr = (char *) (((unsigned long)Host_memory_ptr + 0xF) & ~0xF);
	ohci_Ctl_TD1 = (ohci_td_t *) Host_memory_ptr;
	
	//Allocate TD format structure
	Host_memory_ptr = (char *)malloc(sizeof(ohci_td_t)+16);	//sizeof ohci_ed_t + 16
	Host_memory_ptr = (char *) (((unsigned long)Host_memory_ptr + 0xF) & ~0xF);
	ohci_Ctl_TD2 = (ohci_td_t *) Host_memory_ptr;

	//Allocate TD format structure
	Host_memory_ptr = (char *)malloc(sizeof(ohci_td_t)+16);	//sizeof ohci_ed_t + 16
	Host_memory_ptr = (char *) (((unsigned long)Host_memory_ptr + 0xF) & ~0xF);
	ohci_Ctl_TD3 = (ohci_td_t *) Host_memory_ptr;
	
	Host_memory_ptr = (char *)malloc(sizeof(setup_format));
	Ctl_Setup = (setup_format *) Host_memory_ptr;

}

BOOL OHCI_InitEDTD(void)
{
	InitOHCIEndPoint0();
	InitOHCIControl3TD();
	
	return TRUE;
}

BOOL Do_OHCI_Get_Device_Descriptor(void)
{
	//int i;
	u32 Temp;
	//char *p, *q;
	
	//Setup Stage
	Ctl_Setup->bmRequestType = 0x80;
	Ctl_Setup->bRequest = 0x06;
	Ctl_Setup->wValue = 0x0100;
	Ctl_Setup->wIndex = 0x0000;
	Ctl_Setup->wLength = 0x0008;
	
	ohci_Ctl_TD1->hwINFO = TD_DP_SETUP|TD_T_DATA0|TD_DI;//0x02400000L;
	ohci_Ctl_TD1->hwNextTD = 0;
	ohci_Ctl_TD1->hwCBP = (UpperAddr(Ctl_Setup) << 16) + LowerAddr(Ctl_Setup);
	ohci_Ctl_TD1->hwBE = ohci_Ctl_TD1->hwCBP + sizeof(setup_format) - 1;

	//Data Stage
	Ctl_Data = (char *)dev_des;
		
	ohci_Ctl_TD2->hwINFO = TD_DP_IN|TD_T_DATA1|TD_DI|TD_R;//0x03540000L;
	ohci_Ctl_TD2->hwNextTD = 0;
	ohci_Ctl_TD2->hwCBP = (UpperAddr(Ctl_Data) << 16) + LowerAddr(Ctl_Data);
	ohci_Ctl_TD2->hwBE = ohci_Ctl_TD2->hwCBP + 7;	//In 8 bytes

	//Status Stage
	ohci_Ctl_TD3->hwINFO = TD_DP_OUT|TD_T_DATA1|TD_DI;//0x02480000L;
	ohci_Ctl_TD3->hwNextTD = 0;
	ohci_Ctl_TD3->hwCBP = 0;
	ohci_Ctl_TD3->hwBE = 0;	//Out 0 bytes
	
	AddingTDtoED(ohci_Ep0, ohci_Ctl_TD3);
	AddingTDtoED(ohci_Ep0, ohci_Ctl_TD2);
	AddingTDtoED(ohci_Ep0, ohci_Ctl_TD1);
	
	//Set Control_Filled
	Temp = ohci_regs->cmdstatus | OHCI_CLF;
	DWordWrite(&ohci_regs->cmdstatus, Temp);

	do{} while((dev_des->bLength != 0x12) || (DoneHeadClear == FALSE));
/*
	p = (char *) dev_des;
	q = (char *) UDisk_dev_des;
	for(i=0;i<8;i++)
		if(*p++ != *q++)
			return FALSE;
*/	
	return TRUE;
}

void SetOHCIAddress(int Address)
{
	u32 Temp;
	
	//Setup Stage
	Ctl_Setup->bmRequestType = 0x00;
	Ctl_Setup->bRequest = 0x05;
	Ctl_Setup->wValue = Address;
	Ctl_Setup->wIndex = 0x0000;
	Ctl_Setup->wLength = 0x0000;
	
	ohci_Ctl_TD1->hwINFO = TD_DP_SETUP|TD_T_DATA0|TD_DI;//0x02400000L;
	ohci_Ctl_TD1->hwNextTD = 0;
	ohci_Ctl_TD1->hwCBP = (UpperAddr(Ctl_Setup) << 16) + LowerAddr(Ctl_Setup);
	ohci_Ctl_TD1->hwBE = ohci_Ctl_TD1->hwCBP + sizeof(setup_format) - 1;
	
	//Status Stage
	ohci_Ctl_TD3->hwINFO = TD_DP_IN|TD_T_DATA1|TD_DI;//0x02480000L;
	ohci_Ctl_TD3->hwNextTD = 0;
	ohci_Ctl_TD3->hwCBP = 0;
	ohci_Ctl_TD3->hwBE = 0;	//Out 0 bytes
	
	AddingTDtoED(ohci_Ep0, ohci_Ctl_TD3);
	AddingTDtoED(ohci_Ep0, ohci_Ctl_TD1);
	
	//Set Control_Filled
	Temp = ohci_regs->cmdstatus | OHCI_CLF;
	DWordWrite(&ohci_regs->cmdstatus, Temp);
	
	do{} while(DoneHeadClear == FALSE);
	
	Temp = dev_des->bMaxPacketSize;
	ohci_Ep0->hwINFO = (Temp << 16)|ED_D_TD|ED_EN_0|ED_FA_3;
}

BOOL InitOHCIControlTransfer()
{
	//do{} while(g_OHCIAttach == 0);
	
	ohci_Ep0->hwINFO = 0x00080000L|ED_D_TD|ED_EN_0|ED_FA_0;
	
	//Set Port reset
	g_OHCIAttach = 0;
	DWordWrite(&ohci_regs->portstatus1, RH_PS_PRS);
	//Wait Device ready
	do{} while(g_OHCIAttach == 0);
	
	if(Do_OHCI_Get_Device_Descriptor() == FALSE)
		return FALSE;
		
	//Set Port reset
	g_OHCIAttach = 0;
	DWordWrite(&ohci_regs->portstatus1, RH_PS_PRS);	
	//Wait Device ready
	do{} while(g_OHCIAttach == 0);
	
	//Set a Address to device
	SetOHCIAddress(3);
		
	return TRUE;
}

/*-------------------------------------------------------------------------*
 * Done List handling functions
 * //Unlink the TD from DoneHead and set complete status
 *-------------------------------------------------------------------------*/

BOOL dl_done_list()
{
	u32 Temp, Temp1;
	
	Temp = ohci_hcca->done_head & ~0xF;
	Temp1 = (UpperAddr(ohci_Ctl_TD3) << 16) + LowerAddr(ohci_Ctl_TD3);
	if(Temp == Temp1) {
		if((ohci_Ctl_TD3->hwINFO & 0xF0000000L) != TD_CC_NOERROR)
			return FALSE;
		ohci_hcca->done_head = ohci_Ctl_TD3->hwNextTD;
		
		//For one control transfer complete
		DoneHeadClear = TRUE;
	}
	Temp = ohci_hcca->done_head & ~0xF;
	Temp1 = (UpperAddr(ohci_Ctl_TD2) << 16) + LowerAddr(ohci_Ctl_TD2);
	if(Temp == Temp1) {
		if((ohci_Ctl_TD2->hwINFO & 0xF0000000L) != TD_CC_NOERROR)
			return FALSE;
		ohci_hcca->done_head = ohci_Ctl_TD2->hwNextTD;
	}
	Temp = ohci_hcca->done_head & ~0xF;
	Temp1 = (UpperAddr(ohci_Ctl_TD1) << 16) + LowerAddr(ohci_Ctl_TD1);
	if(Temp == Temp1) {
		if((ohci_Ctl_TD1->hwINFO & 0xF0000000L) != TD_CC_NOERROR)
			return FALSE;
		ohci_hcca->done_head = ohci_Ctl_TD1->hwNextTD;
	}
	//CBW
	Temp = ohci_hcca->done_head & ~0xF;
	Temp1 = (UpperAddr(ohci_CBW_TD) << 16) + LowerAddr(ohci_CBW_TD);
	if(Temp == Temp1) {
		if((ohci_CBW_TD->hwINFO & 0xF0000000L) != TD_CC_NOERROR)
			return FALSE;
		ohci_hcca->done_head = ohci_CBW_TD->hwNextTD;
		TD_Status &= ~St_CBW_TD;
	}
	//CSW
	Temp = ohci_hcca->done_head & ~0xF;
	Temp1 = (UpperAddr(ohci_CSW_TD) << 16) + LowerAddr(ohci_CSW_TD);
	if(Temp == Temp1) {
		if((ohci_CSW_TD->hwINFO & 0xF0000000L) != TD_CC_NOERROR)
			return FALSE;
		ohci_hcca->done_head = ohci_CSW_TD->hwNextTD;
		TD_Status &= ~St_CSW_TD;
	}
	//CBW Data In
	Temp = ohci_hcca->done_head & ~0xF;
	Temp1 = (UpperAddr(ohci_DataIn_TD) << 16) + LowerAddr(ohci_DataIn_TD);
	if(Temp == Temp1) {
		if((ohci_DataIn_TD->hwINFO & 0xF0000000L) != TD_CC_NOERROR)
			return FALSE;
		ohci_hcca->done_head = ohci_DataIn_TD->hwNextTD;
		TD_Status &= ~St_DataIn_TD;
	}
	//CBW Data Out
	Temp = ohci_hcca->done_head & ~0xF;
	Temp1 = (UpperAddr(ohci_DataOut_TD) << 16) + LowerAddr(ohci_DataOut_TD);