v3k_fram_use_example_sdcc.rel

这是ramtron公司的铁电单片机的开发程序

S A$V3K_FRAM_Use_Example_SDCC$590 Def002D
S A$V3K_FRAM_Use_Example_SDCC$536 Def000A
S A$V3K_FRAM_Use_Example_SDCC$870 Def0115
S A$V3K_FRAM_Use_Example_SDCC$852 Def0102
S A$V3K_FRAM_Use_Example_SDCC$843 Def00FB
S A$V3K_FRAM_Use_Example_SDCC$834 Def00F4
S A$V3K_FRAM_Use_Example_SDCC$816 Def00E9
S A$V3K_FRAM_Use_Example_SDCC$807 Def00E3
S A$V3K_FRAM_Use_Example_SDCC$771 Def00CA
S A$V3K_FRAM_Use_Example_SDCC$762 Def00C1
S A$V3K_FRAM_Use_Example_SDCC$753 Def00B7
S A$V3K_FRAM_Use_Example_SDCC$744 Def00AF
S A$V3K_FRAM_Use_Example_SDCC$726 Def00A4
S A$V3K_FRAM_Use_Example_SDCC$690 Def008C
S A$V3K_FRAM_Use_Example_SDCC$681 Def0080
S A$V3K_FRAM_Use_Example_SDCC$636 Def0058
S A$V3K_FRAM_Use_Example_SDCC$618 Def0044
S A$V3K_FRAM_Use_Example_SDCC$609 Def003E
S A$V3K_FRAM_Use_Example_SDCC$582 Def0028
S A$V3K_FRAM_Use_Example_SDCC$537 Def000B
S A$V3K_FRAM_Use_Example_SDCC$871 Def0116
S A$V3K_FRAM_Use_Example_SDCC$853 Def0103
S A$V3K_FRAM_Use_Example_SDCC$844 Def00FC
S A$V3K_FRAM_Use_Example_SDCC$790 Def00D9
S A$V3K_FRAM_Use_Example_SDCC$772 Def00CB
S A$V3K_FRAM_Use_Example_SDCC$754 Def00B8
S A$V3K_FRAM_Use_Example_SDCC$745 Def00B1
S A$V3K_FRAM_Use_Example_SDCC$736 Def00AA
S A$V3K_FRAM_Use_Example_SDCC$718 Def009F
S A$V3K_FRAM_Use_Example_SDCC$709 Def0099
S A$V3K_FRAM_Use_Example_SDCC$637 Def0059
S A$V3K_FRAM_Use_Example_SDCC$628 Def0051
S A$V3K_FRAM_Use_Example_SDCC$619 Def0046
S A$V3K_FRAM_Use_Example_SDCC$574 Def0023
S A$V3K_FRAM_Use_Example_SDCC$565 Def001D
S A$V3K_FRAM_Use_Example_SDCC$538 Def000C
S A$V3K_FRAM_Use_Example_SDCC$890 Def0125
S A$V3K_FRAM_Use_Example_SDCC$881 Def011C
S A$V3K_FRAM_Use_Example_SDCC$872 Def0118
S A$V3K_FRAM_Use_Example_SDCC$854 Def0105
S A$V3K_FRAM_Use_Example_SDCC$845 Def00FD
S A$V3K_FRAM_Use_Example_SDCC$791 Def00DA
S A$V3K_FRAM_Use_Example_SDCC$773 Def00CC
S A$V3K_FRAM_Use_Example_SDCC$755 Def00B9
S A$V3K_FRAM_Use_Example_SDCC$746 Def00B2
S A$V3K_FRAM_Use_Example_SDCC$656 Def0067
S A$V3K_FRAM_Use_Example_SDCC$629 Def0053
S A$V3K_FRAM_Use_Example_SDCC$557 Def0018
S A$V3K_FRAM_Use_Example_SDCC$548 Def0012
S A$V3K_FRAM_Use_Example_SDCC$539 Def000D
S A$V3K_FRAM_Use_Example_SDCC$476 Def0000
S C$V3K_FRAM_Use_Example_SDCC.c$40$1$1 Def0015
S C$V3K_FRAM_Use_Example_SDCC.c$33$0$0 Def0008
S A$V3K_FRAM_Use_Example_SDCC$855 Def0106
S A$V3K_FRAM_Use_Example_SDCC$846 Def00FE
S A$V3K_FRAM_Use_Example_SDCC$837 Def00F6
S A$V3K_FRAM_Use_Example_SDCC$792 Def00DB
S A$V3K_FRAM_Use_Example_SDCC$783 Def00D2
S A$V3K_FRAM_Use_Example_SDCC$774 Def00CE
S A$V3K_FRAM_Use_Example_SDCC$756 Def00BB
S A$V3K_FRAM_Use_Example_SDCC$747 Def00B3
S A$V3K_FRAM_Use_Example_SDCC$693 Def008E
S A$V3K_FRAM_Use_Example_SDCC$675 Def0078
S A$V3K_FRAM_Use_Example_SDCC$657 Def0069
S A$V3K_FRAM_Use_Example_SDCC$639 Def005A
S C$V3K_FRAM_Use_Example_SDCC.c$41$1$1 Def0018
S A$V3K_FRAM_Use_Example_SDCC$883 Def011E
S A$V3K_FRAM_Use_Example_SDCC$865 Def010D
S A$V3K_FRAM_Use_Example_SDCC$856 Def0107
S A$V3K_FRAM_Use_Example_SDCC$829 Def00F1
S A$V3K_FRAM_Use_Example_SDCC$757 Def00BC
S A$V3K_FRAM_Use_Example_SDCC$748 Def00B4
S A$V3K_FRAM_Use_Example_SDCC$739 Def00AC
S A$V3K_FRAM_Use_Example_SDCC$694 Def008F
S A$V3K_FRAM_Use_Example_SDCC$685 Def0082
S A$V3K_FRAM_Use_Example_SDCC$676 Def007A
S A$V3K_FRAM_Use_Example_SDCC$667 Def0071
S A$V3K_FRAM_Use_Example_SDCC$658 Def006B
S A$V3K_FRAM_Use_Example_SDCC$595 Def0030
S A$V3K_FRAM_Use_Example_SDCC$577 Def0025
S C$V3K_FRAM_Use_Example_SDCC.c$34$1$0 Def0008
S G$main$0$0 Def0008
S A$V3K_FRAM_Use_Example_SDCC$884 Def0120
S A$V3K_FRAM_Use_Example_SDCC$866 Def010F
S A$V3K_FRAM_Use_Example_SDCC$857 Def0109
S A$V3K_FRAM_Use_Example_SDCC$794 Def00DC
S A$V3K_FRAM_Use_Example_SDCC$785 Def00D4
S A$V3K_FRAM_Use_Example_SDCC$767 Def00C3
S A$V3K_FRAM_Use_Example_SDCC$758 Def00BD
S A$V3K_FRAM_Use_Example_SDCC$686 Def0084
S A$V3K_FRAM_Use_Example_SDCC$677 Def007C
S A$V3K_FRAM_Use_Example_SDCC$668 Def0073
S A$V3K_FRAM_Use_Example_SDCC$659 Def006C
S A$V3K_FRAM_Use_Example_SDCC$596 Def0032
S A$V3K_FRAM_Use_Example_SDCC$587 Def002B
S A$V3K_FRAM_Use_Example_SDCC$569 Def0020
S C$V3K_FRAM_Use_Example_SDCC.c$70$1$1 Def0094
S C$V3K_FRAM_Use_Example_SDCC.c$61$1$1 Def0071
S C$V3K_FRAM_Use_Example_SDCC.c$43$1$1 Def001D
S C$V3K_FRAM_Use_Example_SDCC.c$35$1$0 Def000E
S A$V3K_FRAM_Use_Example_SDCC$894 Def0126
S A$V3K_FRAM_Use_Example_SDCC$885 Def0121
S A$V3K_FRAM_Use_Example_SDCC$876 Def011A
S A$V3K_FRAM_Use_Example_SDCC$867 Def0110
S A$V3K_FRAM_Use_Example_SDCC$849 Def00FF
S A$V3K_FRAM_Use_Example_SDCC$786 Def00D6
S A$V3K_FRAM_Use_Example_SDCC$768 Def00C5
S A$V3K_FRAM_Use_Example_SDCC$759 Def00BF
S A$V3K_FRAM_Use_Example_SDCC$696 Def0090
S A$V3K_FRAM_Use_Example_SDCC$687 Def0086
S A$V3K_FRAM_Use_Example_SDCC$678 Def007D
S A$V3K_FRAM_Use_Example_SDCC$669 Def0075
S A$V3K_FRAM_Use_Example_SDCC$597 Def0033
S C$V3K_FRAM_Use_Example_SDCC.c$71$1$1 Def0097
S C$V3K_FRAM_Use_Example_SDCC.c$53$1$1 Def0054
S C$V3K_FRAM_Use_Example_SDCC.c$44$1$1 Def0020
S A$V3K_FRAM_Use_Example_SDCC$877 Def011B
S A$V3K_FRAM_Use_Example_SDCC$868 Def0112
S A$V3K_FRAM_Use_Example_SDCC$787 Def00D7
S A$V3K_FRAM_Use_Example_SDCC$778 Def00D0
S A$V3K_FRAM_Use_Example_SDCC$769 Def00C6
S A$V3K_FRAM_Use_Example_SDCC$697 Def0092
S A$V3K_FRAM_Use_Example_SDCC$688 Def0088
S A$V3K_FRAM_Use_Example_SDCC$598 Def0034
S C$V3K_FRAM_Use_Example_SDCC.c$90$1$1 Def00E1
S C$V3K_FRAM_Use_Example_SDCC.c$54$1$1 Def0044
S C$V3K_FRAM_Use_Example_SDCC.c$45$1$1 Def0023
S A$V3K_FRAM_Use_Example_SDCC$887 Def0122
S A$V3K_FRAM_Use_Example_SDCC$869 Def0114
S A$V3K_FRAM_Use_Example_SDCC$779 Def00D1
S A$V3K_FRAM_Use_Example_SDCC$689 Def008A
S A$V3K_FRAM_Use_Example_SDCC$599 Def0035
S C$V3K_FRAM_Use_Example_SDCC.c$73$1$1 Def009C
S C$V3K_FRAM_Use_Example_SDCC.c$64$1$1 Def0078
S C$V3K_FRAM_Use_Example_SDCC.c$37$1$1 Def0012
S A$V3K_FRAM_Use_Example_SDCC$897 Def0128
S A$V3K_FRAM_Use_Example_SDCC$888 Def0123
S A$V3K_FRAM_Use_Example_SDCC$789 Def00D8
S C$V3K_FRAM_Use_Example_SDCC.c$92$1$1 Def00E6
S C$V3K_FRAM_Use_Example_SDCC.c$65$1$1 Def0082
S C$V3K_FRAM_Use_Example_SDCC.c$47$1$1 Def0028
S A$V3K_FRAM_Use_Example_SDCC$889 Def0124
S A$V3K_FRAM_Use_Example_SDCC$799 Def00DE
S C$V3K_FRAM_Use_Example_SDCC.c$93$1$1 Def00E9
S C$V3K_FRAM_Use_Example_SDCC.c$75$1$1 Def009F
S C$V3K_FRAM_Use_Example_SDCC.c$94$1$1 Def00EC
S C$V3K_FRAM_Use_Example_SDCC.c$85$1$1 Def00D2
S C$V3K_FRAM_Use_Example_SDCC.c$76$1$1 Def00A2
S C$V3K_FRAM_Use_Example_SDCC.c$58$1$1 Def0060
S C$V3K_FRAM_Use_Example_SDCC.c$49$1$1 Def002B
S C$V3K_FRAM_Use_Example_SDCC.c$86$1$1 Def00C3
S C$V3K_FRAM_Use_Example_SDCC.c$96$1$1 Def00F1
S C$V3K_FRAM_Use_Example_SDCC.c$78$1$1 Def00A7
S C$V3K_FRAM_Use_Example_SDCC.c$79$1$1 Def00AA
S C$V3K_FRAM_Use_Example_SDCC.c$98$1$1 Def00F4
S C$V3K_FRAM_Use_Example_SDCC.c$89$1$1 Def00DE
S __sdcc_program_startup Def0003
A GSINIT0 size 0 flags 20
A GSINIT1 size 0 flags 20
A GSINIT2 size 0 flags 20
A GSINIT3 size 0 flags 20
A GSINIT4 size 0 flags 20
A GSINIT5 size 0 flags 20
A GSINIT size 6 flags 20
S A$V3K_FRAM_Use_Example_SDCC$494 Def0000
S A$V3K_FRAM_Use_Example_SDCC$495 Def0003
S C$V3K_FRAM_Use_Example_SDCC.c$27$1$1 Def0000
A GSFINAL size 3 flags 20
S A$V3K_FRAM_Use_Example_SDCC$497 Def0000
A HOME size 0 flags 20
A XINIT size 0 flags 20
T 00 00
R 00 00 00 02
T 00 00
R 00 00 00 03
T 00 00
R 00 00 00 03
T 00 00
R 00 00 00 05
T 00 00
R 00 00 00 05
T 00 00
R 00 00 00 06
T 00 00
R 00 00 00 06
T 00 02
R 00 00 00 06
T 00 02
R 00 00 00 06
T 00 00
R 00 00 00 0B
T 00 00 02 00 00
R 00 00 00 0B 02 03 00 F6
T 00 00 75 00 00 00 75 00 01 80
R 00 00 00 12 29 03 00 03 29 07 00 03
T 00 00 02 00 03
R 00 00 00 13 00 03 00 0B
T 00 03
R 00 00 00 0B
T 00 03 12 00 08 80 FE
R 00 00 00 0B 00 03 00 0B
T 00 08
R 00 00 00 0B
T 00 08 78 00 00 E4 F6 08 F6 78 00 02 76 00 43 F6
R 00 00 00 0B 09 03 00 06 09 0A 00 06
T 00 14 C0 75 DC 01
R 00 00 00 0B
T 00 18
R 00 00 00 0B
T 00 18 E5 DC 30 E7 FB
R 00 00 00 0B
T 00 1D
R 00 00 00 0B
T 00 1D 75 DD 00 75 DC 07
R 00 00 00 0B
T 00 23
R 00 00 00 0B
T 00 23 E5 DC 30 E7 FB
R 00 00 00 0B
T 00 28
R 00 00 00 0B
T 00 28 75 DC 03
R 00 00 00 0B
T 00 2B
R 00 00 00 0B
T 00 2B E5 DC 30 E7 FB
R 00 00 00 0B
T 00 30
R 00 00 00 0B
T 00 30 78 00 00 E4 F6 08 F6
R 00 00 00 0B 09 03 00 06
T 00 36
R 00 00 00 0B
T 00 36 78 00 00 C3 E6 94 00 08 E6 64 80 94 A0 50
R 00 00 00 0B 09 03 00 06
T 00 43 1C
R 00 00 00 0B
T 00 44
R 00 00 00 0B
T 00 44 78 00 00 E6 25 00 00 F5 82 08 E6 35
R 00 00 00 0B 09 03 00 06 29 07 00 03
T 00 4E 00 01 F5 83 74 55 F0 78 00 00 74 01 26 F6
R 00 00 00 0B 29 02 00 03 09 0A 00 06
T 00 5A E4 08 36 F6 80 D6
R 00 00 00 0B
T 00 60
R 00 00 00 0B
T 00 60 AA 00 00 74 01 25 00 01 FB 8A 82 8B 83 E0
R 00 00 00 0B 29 03 00 03 29 08 00 03
T 00 6C FC 78 00 02 A6 04 8A 82 8B 83 74 23 F0 8A
R 00 00 00 0B 09 04 00 06
T 00 79 82 8B 83 E0 FA 78 00 02 A6 02 74 01 25
R 00 00 00 0B 09 08 00 06
T 00 85 00 00 F5 82 74 01 35 00 01 F5 83 E0 FA 78
R 00 00 00 0B 29 02 00 03 29 09 00 03
T 00 91 00 02 A6 02 75 DC 01
R 00 00 00 0B 09 02 00 06
T 00 97
R 00 00 00 0B
T 00 97 E5 DC 30 E7 FB
R 00 00 00 0B
T 00 9C
R 00 00 00 0B
T 00 9C 75 DD 0C 75 DC 07
R 00 00 00 0B
T 00 A2
R 00 00 00 0B
T 00 A2 E5 DC 30 E7 FB
R 00 00 00 0B
T 00 A7
R 00 00 00 0B
T 00 A7 75 DC 03
R 00 00 00 0B
T 00 AA
R 00 00 00 0B
T 00 AA E5 DC 30 E7 FB
R 00 00 00 0B
T 00 AF
R 00 00 00 0B
T 00 AF 78 00 00 E4 F6 08 F6
R 00 00 00 0B 09 03 00 06
T 00 B5
R 00 00 00 0B
T 00 B5 78 00 00 C3 E6 94 00 08 E6 64 80 94 A0 50
R 00 00 00 0B 09 03 00 06
T 00 C2 1B
R 00 00 00 0B
T 00 C3
R 00 00 00 0B
T 00 C3 78 00 00 E6 25 00 00 F5 82 08 E6 35
R 00 00 00 0B 09 03 00 06 29 07 00 03
T 00 CD 00 01 F5 83 E4 F0 78 00 00 74 01 26 F6 E4
R 00 00 00 0B 29 02 00 03 09 09 00 06
T 00 D9 08 36 F6 80 D7
R 00 00 00 0B
T 00 DE
R 00 00 00 0B
T 00 DE 75 DC 01
R 00 00 00 0B
T 00 E1
R 00 00 00 0B
T 00 E1 E5 DC 30 E7 FB
R 00 00 00 0B
T 00 E6
R 00 00 00 0B
T 00 E6 75 DD 00 75 DC 07
R 00 00 00 0B
T 00 EC
R 00 00 00 0B
T 00 EC E5 DC 30 E7 FB
R 00 00 00 0B
T 00 F1
R 00 00 00 0B
T 00 F1 75 DC 03
R 00 00 00 0B
T 00 F4
R 00 00 00 0B
T 00 F4 E5 DC 30 E7 FB
R 00 00 00 0B
T 00 F9
R 00 00 00 0B
T 00 F9 78 00 00 E4 F6 08 F6
R 00 00 00 0B 09 03 00 06
T 00 FF
R 00 00 00 0B
T 00 FF 78 00 00 C3 E6 94 00 08 E6 64 80 94 A0 50
R 00 00 00 0B 09 03 00 06
T 01 0C 1B
R 00 00 00 0B
T 01 0D
R 00 00 00 0B
T 01 0D 78 00 00 E6 25 00 00 F5 82 08 E6 35
R 00 00 00 0B 09 03 00 06 29 07 00 03
T 01 17 00 01 F5 83 E4 F0 78 00 00 74 01 26 F6 E4
R 00 00 00 0B 29 02 00 03 09 09 00 06
T 01 23 08 36 F6 80 D7
R 00 00 00 0B
T 01 28
R 00 00 00 0B
T 01 28 80 FE
R 00 00 00 0B
T 01 2A
R 00 00 00 0B
T 01 2A 22
R 00 00 00 0B