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# //  ModelSim SE 5.8b Jan 01 2004 
# //
# //  Copyright Model Technology, a Mentor Graphics Corporation company, 2004
# //                         All Rights Reserved.
# //                   UNPUBLISHED, LICENSED SOFTWARE.
# //         CONFIDENTIAL AND PROPRIETARY INFORMATION WHICH IS THE
# //        PROPERTY OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS.
# //
# do xlcosim_dac_test_modelsim.tcl 
# Connected to Xilinx System Generator Block  
# sock560
# 0
# 0
# sec
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim SE vlog 5.8b Compiler 2004.01 Jan 26 2004
# -- Compiling module iir_filter
# 
# Top level modules:
# 	iir_filter
# Model Technology ModelSim SE vlog 5.8b Compiler 2004.01 Jan 26 2004
# -- Compiling module iir_6_filter
# 
# Top level modules:
# 	iir_6_filter
# Model Technology ModelSim SE vlog 5.8b Compiler 2004.01 Jan 26 2004
# -- Compiling module dac_test_black_box_wrapper
# 
# Top level modules:
# 	dac_test_black_box_wrapper
# Model Technology ModelSim SE vcom 5.8b Compiler 2004.01 Jan 26 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Compiling entity xlcosim_dac_test_modelsim_clk_drvr
# -- Compiling architecture behavior of xlcosim_dac_test_modelsim_clk_drvr
# Model Technology ModelSim SE vcom 5.8b Compiler 2004.01 Jan 26 2004
# -- Loading package standard
# -- Compiling entity xlcosim_fli_controller
# -- Compiling architecture only of xlcosim_fli_controller
# -- Loading package std_logic_1164
# -- Compiling entity xlcosim_dac_test_modelsim
# -- Compiling architecture structural of xlcosim_dac_test_modelsim
# -- Loading entity xlcosim_dac_test_modelsim_clk_drvr
# -- Loading package vl_types
# -- Loading entity dac_test_black_box_wrapper
# -- Loading entity xlcosim_fli_controller
# vsim work.xlcosim_dac_test_modelsim 
# Loading d:\Modeltech_5.8b\win32/novas.dll
# Loading d:\Modeltech_5.8b\win32/../std.standard
# Loading d:\Modeltech_5.8b\win32/../ieee.std_logic_1164(body)
# Loading d:\Modeltech_5.8b\win32/../verilog.vl_types(body)
# Loading work.xlcosim_dac_test_modelsim(structural)
# Loading work.xlcosim_dac_test_modelsim_clk_drvr(behavior)
# Loading work.dac_test_black_box_wrapper
# Loading work.iir_filter
# Loading work.iir_6_filter
# Loading work.xlcosim_fli_controller(only)
# Loading D:/MATLAB701/toolbox/xilinx/sysgen/bin/MTIFLIcontroller.dll
# Debussy Release 5.3v9 (Win95/NT) ModelSim - 09/16/2003 compile
# *Debussy* Create FSDB file 'test.fsdb'
# *Debussy* Start dumping the scope(xlcosim_dac_test_modelsim.dac_test_black_box.dac_test_black_box.iir_filter), layer(0).
# ** Warning: Unknown scope type: xlcosim_dac_test_modelsim 1010
#     : iir_filter.v(24)
#    Time: 0 ns  Iteration: 0  Instance: /xlcosim_dac_test_modelsim/dac_test_black_box/dac_test_black_box
# ** Warning: Unknown scope type: xlcosim_dac_test_modelsim 1010
#     : iir_filter.v(24)
#    Time: 0 ns  Iteration: 0  Instance: /xlcosim_dac_test_modelsim/dac_test_black_box/dac_test_black_box
# *Debussy* End of dumping.
# ** Warning: $fsdbDumpfile - One FSDB file has already opened for dumping.
#     : iir_filter.v(25)
#    Time: 0 ns  Iteration: 0  Instance: /xlcosim_dac_test_modelsim/dac_test_black_box/dac_test_black_box
# The System Generator simulation has terminated.
# The System Generator co-simulation interface will now pause (but not terminate)
# the ModelSim simulation so as to allow inspection of the design state.
# Simulation halt requested by foreign interface.