📄 me_register_test.list
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.%var $$l0000!dr1 0 R
.%liverange 0 $$W1 3585:3585
.%liverange 0 $$R1 122:3583
.%var $$l0000!dr0 0 R
.%liverange 0 $$W0 3585:3585
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.%var $$l0000!dw15 0 R
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.%var $$l0000!dw14 0 R
.%liverange 0 $$W14 93:3583
.%liverange 0 $$R14 3585:3585
.%var $$l0000!dw13 0 R
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.%liverange 0 $$R13 3585:3585
.%var $$l0000!dw12 0 R
.%liverange 0 $$W12 81:3583
.%liverange 0 $$R12 3585:3585
.%var $$l0000!dw11 0 R
.%liverange 0 $$W11 75:3583
.%liverange 0 $$R11 3585:3585
.%var $$l0000!dw10 0 R
.%liverange 0 $$W10 69:3583
.%liverange 0 $$R10 3585:3585
.%var $$l0000!dw9 0 R
.%liverange 0 $$W9 63:3583
.%liverange 0 $$R9 3585:3585
.%var $$l0000!dw8 0 R
.%liverange 0 $$W8 57:3583
.%liverange 0 $$R8 3585:3585
.%var $$l0000!dw7 0 R
.%liverange 0 $$W7 51:3583
.%liverange 0 $$R7 3585:3585
.%var $$l0000!dw6 0 R
.%liverange 0 $$W6 45:3583
.%liverange 0 $$R6 3585:3585
.%var $$l0000!dw5 0 R
.%liverange 0 $$W5 39:3583
.%liverange 0 $$R5 3585:3585
.%var $$l0000!dw4 0 R
.%liverange 0 $$W4 33:3583
.%liverange 0 $$R4 3585:3585
.%var $$l0000!dw3 0 R
.%liverange 0 $$W3 27:3583
.%liverange 0 $$R3 3585:3585
.%var $$l0000!dw2 0 R
.%liverange 0 $$W2 21:3583
.%liverange 0 $$R2 3585:3585
.%var $$l0000!dw1 0 R
.%liverange 0 $$W1 15:3583
.%liverange 0 $$R1 3585:3585
.%var $$l0000!dw0 0 R
.%liverange 0 $$W0 9:3583
.%liverange 0 $$R0 3585:3585
.%var $l0000!sr15 0 R
.%liverange 0 $W15 3585:3585
.%liverange 0 $R15 3585:3585
.%var $l0000!sr14 0 R
.%liverange 0 $W14 3585:3585
.%liverange 0 $R14 3585:3585
.%var $l0000!sr13 0 R
.%liverange 0 $W13 3585:3585
.%liverange 0 $R13 3585:3585
.%var $l0000!sr12 0 R
.%liverange 0 $W12 3585:3585
.%liverange 0 $R12 3585:3585
.%var $l0000!sr11 0 R
.%liverange 0 $W11 3585:3585
.%liverange 0 $R11 3585:3585
.%var $l0000!sr10 0 R
.%liverange 0 $W10 3585:3585
.%liverange 0 $R10 3585:3585
.%var $l0000!sr9 0 R
.%liverange 0 $W9 3585:3585
.%liverange 0 $R9 3585:3585
.%var $l0000!sr8 0 R
.%liverange 0 $W8 3585:3585
.%liverange 0 $R8 3585:3585
.%var $l0000!sr7 0 R
.%liverange 0 $W7 3585:3585
.%liverange 0 $R7 116:3583
.%var $l0000!sr6 0 R
.%liverange 0 $W6 3585:3585
.%liverange 0 $R6 116:3583
.%var $l0000!sr5 0 R
.%liverange 0 $W5 3585:3585
.%liverange 0 $R5 116:3583
.%var $l0000!sr4 0 R
.%liverange 0 $W4 3585:3585
.%liverange 0 $R4 116:3583
.%var $l0000!sr3 0 R
.%liverange 0 $W3 3585:3585
.%liverange 0 $R3 116:3583
.%var $l0000!sr2 0 R
.%liverange 0 $W2 3585:3585
.%liverange 0 $R2 116:3583
.%var $l0000!sr1 0 R
.%liverange 0 $W1 3585:3585
.%liverange 0 $R1 116:3583
.%var $l0000!sr0 0 R
.%liverange 0 $W0 3585:3585
.%liverange 0 $R0 116:3583
.%var $l0000!sw15 0 R
.%liverange 0 $W15 96:3583
.%liverange 0 $R15 3585:3585
.%var $l0000!sw14 0 R
.%liverange 0 $W14 90:3583
.%liverange 0 $R14 3585:3585
.%var $l0000!sw13 0 R
.%liverange 0 $W13 84:3583
.%liverange 0 $R13 3585:3585
.%var $l0000!sw12 0 R
.%liverange 0 $W12 78:3583
.%liverange 0 $R12 3585:3585
.%var $l0000!sw11 0 R
.%liverange 0 $W11 72:3583
.%liverange 0 $R11 3585:3585
.%var $l0000!sw10 0 R
.%liverange 0 $W10 66:3583
.%liverange 0 $R10 3585:3585
.%var $l0000!sw9 0 R
.%liverange 0 $W9 60:3583
.%liverange 0 $R9 3585:3585
.%var $l0000!sw8 0 R
.%liverange 0 $W8 54:3583
.%liverange 0 $R8 3585:3585
.%var $l0000!sw7 0 R
.%liverange 0 $W7 48:3583
.%liverange 0 $R7 3585:3585
.%var $l0000!sw6 0 R
.%liverange 0 $W6 42:3583
.%liverange 0 $R6 3585:3585
.%var $l0000!sw5 0 R
.%liverange 0 $W5 36:3583
.%liverange 0 $R5 3585:3585
.%var $l0000!sw4 0 R
.%liverange 0 $W4 30:3583
.%liverange 0 $R4 3585:3585
.%var $l0000!sw3 0 R
.%liverange 0 $W3 24:3583
.%liverange 0 $R3 3585:3585
.%var $l0000!sw2 0 R
.%liverange 0 $W2 18:3583
.%liverange 0 $R2 3585:3585
.%var $l0000!sw1 0 R
.%liverange 0 $W1 12:3583
.%liverange 0 $R1 3585:3585
.%var $l0000!sw0 0 R
.%liverange 0 $W0 6:3583
.%liverange 0 $R0 3585:3585
.%var l0000!b15 0 R
.%liverange 0 B15 456:462 493:3583
.%var l0000!b14 0 R
.%liverange 0 B14 362:3583
.%var l0000!b13 0 R
.%liverange 0 B13 360:3583
.%var l0000!b12 0 R
.%liverange 0 B12 358:3583
.%var l0000!b11 0 R
.%liverange 0 B11 356:3583
.%var l0000!b10 0 R
.%liverange 0 B10 354:3583
.%var l0000!b9 0 R
.%liverange 0 B9 352:3583
.%var l0000!b8 0 R
.%liverange 0 B8 350:3583
.%var l0000!b7 0 R
.%liverange 0 B7 348:3583
.%var l0000!b6 0 R
.%liverange 0 B6 346:3583
.%var l0000!b5 0 R
.%liverange 0 B5 344:3583
.%var l0000!b4 0 R
.%liverange 0 B4 342:3583
.%var l0000!b3 0 R
.%liverange 0 B3 340:3583
.%var l0000!b2 0 R
.%liverange 0 B2 338:3583
.%var l0000!b1 0 R
.%liverange 0 B1 102:3583
.%var l0000!b0 0 R
.%liverange 0 B0 4:3583
.%var l0000!a15 0 R
.%liverange 0 A15 363:3583
.%var l0000!a14 0 R
.%liverange 0 A14 361:3583
.%var l0000!a13 0 R
.%liverange 0 A13 359:3583
.%var l0000!a12 0 R
.%liverange 0 A12 357:3583
.%var l0000!a11 0 R
.%liverange 0 A11 355:3583
.%var l0000!a10 0 R
.%liverange 0 A10 353:3583
.%var l0000!a9 0 R
.%liverange 0 A9 351:3583
.%var l0000!a8 0 R
.%liverange 0 A8 349:3583
.%var l0000!a7 0 R
.%liverange 0 A7 347:3583
.%var l0000!a6 0 R
.%liverange 0 A6 345:3583
.%var l0000!a5 0 R
.%liverange 0 A5 343:3583
.%var l0000!a4 0 R
.%liverange 0 A4 341:3583
.%var l0000!a3 0 R
.%liverange 0 A3 339:3583
.%var l0000!a2 0 R
.%liverange 0 A2 112:3583
.%var l0000!a1 0 R
.%liverange 0 A1 100:3583
.%var l0000!a0 0 R
.%liverange 0 A0 2:3583
.%var l0000!signal1 1 R
.%liverange 0 G1 2771:2771
.%var l0000!scratch_write 1 R
.%liverange 0 G1 332:332 514:515 2473:2474 2751:2752 3578:3579
.%var l0000!sram_read 1 R
.%liverange 0 G1 116:116
.%var l0000!sram_write 1 R
.%liverange 0 G1 114:114
.%var l0000!dram_read 1 R
.%liverange 0 D2 122:123
.%var l0000!dram_write 1 R
.%liverange 0 D2 120:121
.%scope end
.0 FC044C0000 common_code
.import_var __chip_id i$__chip_id __chip_revision i$__chip_revision __uengine_id i$__uengine_id
.%line 33 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.sig l0000!dram_write l0000!dram_read
.%line 34 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.sig l0000!sram_write l0000!sram_read
.%line 35 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.sig l0000!scratch_write l0000!scratch_read
.%line 37 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.reg l0000!a0 l0000!a1 l0000!a2 l0000!a3 l0000!a4 l0000!a5 l0000!a6 l0000!a7 l0000!a8 l0000!a9 l0000!a10 l0000!a11 l0000!a12 l0000!a13 l0000!a14 l0000!a15
.%line 38 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.reg l0000!b0 l0000!b1 l0000!b2 l0000!b3 l0000!b4 l0000!b5 l0000!b6 l0000!b7 l0000!b8 l0000!b9 l0000!b10 l0000!b11 l0000!b12 l0000!b13 l0000!b14 l0000!b15
.%line 40 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.reg $l0000!sw0 $l0000!sw1 $l0000!sw2 $l0000!sw3 $l0000!sw4 $l0000!sw5 $l0000!sw6 $l0000!sw7 $l0000!sw8 $l0000!sw9 $l0000!sw10 $l0000!sw11 $l0000!sw12 $l0000!sw13 $l0000!sw14 $l0000!sw15
.%line 41 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.reg $l0000!sr0 $l0000!sr1 $l0000!sr2 $l0000!sr3 $l0000!sr4 $l0000!sr5 $l0000!sr6 $l0000!sr7 $l0000!sr8 $l0000!sr9 $l0000!sr10 $l0000!sr11 $l0000!sr12 $l0000!sr13 $l0000!sr14 $l0000!sr15
.%line 42 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.xfer_order $l0000!sw0 $l0000!sw1 $l0000!sw2 $l0000!sw3 $l0000!sw4 $l0000!sw5 $l0000!sw6 $l0000!sw7 $l0000!sw8 $l0000!sw9 $l0000!sw10 $l0000!sw11 $l0000!sw12 $l0000!sw13 $l0000!sw14 $l0000!sw15
.%line 43 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.xfer_order $l0000!sr0 $l0000!sr1 $l0000!sr2 $l0000!sr3 $l0000!sr4 $l0000!sr5 $l0000!sr6 $l0000!sr7 $l0000!sr8 $l0000!sr9 $l0000!sr10 $l0000!sr11 $l0000!sr12 $l0000!sr13 $l0000!sr14 $l0000!sr15
.%line 45 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.reg $$l0000!dw0 $$l0000!dw1 $$l0000!dw2 $$l0000!dw3 $$l0000!dw4 $$l0000!dw5 $$l0000!dw6 $$l0000!dw7 $$l0000!dw8 $$l0000!dw9 $$l0000!dw10 $$l0000!dw11 $$l0000!dw12 $$l0000!dw13 $$l0000!dw14 $$l0000!dw15
.%line 46 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.reg $$l0000!dr0 $$l0000!dr1 $$l0000!dr2 $$l0000!dr3 $$l0000!dr4 $$l0000!dr5 $$l0000!dr6 $$l0000!dr7 $$l0000!dr8 $$l0000!dr9 $$l0000!dr10 $$l0000!dr11 $$l0000!dr12 $$l0000!dr13 $$l0000!dr14 $$l0000!dr15
.%line 47 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.xfer_order $$l0000!dw0 $$l0000!dw1 $$l0000!dw2 $$l0000!dw3 $$l0000!dw4 $$l0000!dw5 $$l0000!dw6 $$l0000!dw7 $$l0000!dw8 $$l0000!dw9 $$l0000!dw10 $$l0000!dw11 $$l0000!dw12 $$l0000!dw13 $$l0000!dw14 $$l0000!dw15
.%line 48 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.xfer_order $$l0000!dr0 $$l0000!dr1 $$l0000!dr2 $$l0000!dr3 $$l0000!dr4 $$l0000!dr5 $$l0000!dr6 $$l0000!dr7 $$l0000!dr8 $$l0000!dr9 $$l0000!dr10 $$l0000!dr11 $$l0000!dr12 $$l0000!dr13 $$l0000!dr14 $$l0000!dr15
.%line 65 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.areg l0000!a0 0
.%line 66 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.breg l0000!b0 0
.%line 65 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.areg l0000!a1 1
.%line 66 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.breg l0000!b1 1
.%line 65 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.areg l0000!a2 2
.%line 66 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.breg l0000!b2 2
.%line 65 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.areg l0000!a3 3
.%line 66 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.breg l0000!b3 3
.%line 65 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.areg l0000!a4 4
.%line 66 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.breg l0000!b4 4
.%line 65 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.areg l0000!a5 5
.%line 66 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.breg l0000!b5 5
.%line 65 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.areg l0000!a6 6
.%line 66 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.breg l0000!b6 6
.%line 65 "C:\phase9rel\diag\test_suites\microcode\ME_Register_Test\ME_Register_Test.uc" 1 0
.areg l0000!a7 7
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