sf_loopback_tx.list

开发Inetl IXP2400平台所必须的硬件诊断和测试程序。该软件包支持的功能包括CPU基本功能检测

+version:  10/31/2000
+switches:  
+uca_version: 3.6.354
+uca_date: Jan 20 2004 14:03:45
+current_date: Tue Mar 02 11:53:11 2004

.cpu_version 0x00000002 1 255

.%num_contexts 8

.%local_mem0_mode rel
.%local_mem1_mode rel

.%init_nn_mode neighbor

.%legacy xfer on

:cont1# 47
:fcififo_empty# 74
:init# 2
:l000_01# 63
:l000_end# 63
:next_packet# 36
:process_fcififo_data# 68
:read_fcififo# 71
:transmit# 40
:wait_for_data# 36
:wait_for_fcififo# 65
*-- no_destination 0
*l0000!temp gpr_a_rel 02
*l0000!get_ring_num gpr_b_rel 02
*l0000!put_ring_num gpr_a_rel 03
*$l0000!scratch_data sram_rel 00 0 both 1 0x0
*l0000!pkt_count_tx gpr_a_rel 04
*l0000!pkt_count_rx gpr_b_rel 03
;*l0000!refcnt!!2 gpr_a_rel 05
;*l0000!refcnt!!3 gpr_a_rel 05
*l0000!refcnt gpr_a_rel 05
;*l0000!byte_cnt!!2 gpr_a_rel 06
*l0000!byte_cnt gpr_b_rel 04
;*l0000!msfaddress!!2 gpr_a_rel 07
;*l0000!msfaddress!!3 gpr_b_rel 05
;*l0000!msfaddress!!4 gpr_b_rel 05
*l0000!msfaddress gpr_b_rel 05
;*l0000!tbuf_addr!!2 gpr_b_rel 06
;*l0000!tbuf_addr!!3 gpr_b_rel 06
*l0000!tbuf_addr gpr_b_rel 06
*l0000!txconfigdata0 gpr_b_rel 08
*$l0000!txconfigdata0 sram_rel 00 0 both 1 0x0
*$l0000!txcontrolword0 sram_rel 00 0 both 2 0x12
*$l0000!txcontrolword1 sram_rel 01 0 both 1 0x12
*l0000!tbuf_element gpr_b_rel 00
*l0000!dram_addr gpr_a_rel 00
*l0000!tbuf gpr_a_rel 01
*l0000!scratch_addr gpr_b_rel 01
;*l0000!sram_addr!!2 gpr_b_rel 09
*l0000!sram_addr gpr_b_rel 09
*l0000!pci_base gpr_b_rel 0A
*l0000!payload_len gpr_b_rel 07
*$l0000!temp_xfer sram_rel 00 0 both 1 0x0
*$l0001!scratch_base sram_rel 00 0 both 1 0x0
*$l0001!scratch_head sram_rel 01 0 both 1 0x0
*$l0001!scratch_tail sram_rel 02 0 both 1 0x0
*l0001!scratch_sig3 signal 03 0
*l0001!scratch_sig3!!2 signal 03 0
*l0001!scratch_sig2 signal 02 0
*l0001!scratch_sig2!!2 signal 02 0
*l0001!scratch_sig1 signal 01 0
*l0001!scratch_sig1!!2 signal 01 0
*l0000!scratch_sig signal 01 0
*l0000!scratch_sig!!3 signal 01 0
*l0000!scratch_sig!!2 signal 01 0
*l0000!msf_sig signal 01 0
*l0000!msf_sig!!5 signal 01 0
*l0000!msf_sig!!4 signal 01 0
*l0000!msf_sig!!3 signal 01 0
*l0000!msf_sig!!2 signal 01 0
*l0000!dram_sig signal 02 0
.%type R
.%type SI
.%scope global
.%var $l0001!scratch_tail 0 R
.%liverange 0 $W2 25:77
.%liverange 0 $R2 78:78
.%var $l0001!scratch_head 0 R
.%liverange 0 $W1 24:35
.%liverange 0 ~$W1 36:52
.%liverange 0 $R1 78:78
.%var $l0001!scratch_base 0 R
.%liverange 0 $W0 26:35
.%liverange 0 ~$W0 36:54
.%liverange 0 $R0 78:78
.%var $l0000!temp_xfer 0 R
.%liverange 0 $W0 69:74
.%liverange 0 ~$W0 68:68
.%liverange 0 $R0 67:77
.%liverange 0 ~$R0 36:36
.%var l0000!payload_len 0 R
.%liverange 0 B7 68:77
.%liverange 0 ~B7 36:67
.%var l0000!pci_base 0 R
.%liverange 0 B10 11:77
.%var l0000!sram_addr 0 R
.%liverange 0 B9 6:77
.%var l0000!scratch_addr 0 R
.%liverange 0 B1 5:77
.%var l0000!tbuf 0 R
.%liverange 0 A1 15:77
.%var l0000!dram_addr 0 R
.%liverange 0 A0 9:77
.%var l0000!tbuf_element 0 R
.%liverange 0 B0 3:77
.%var $l0000!txcontrolword1 0 R
.%liverange 0 $W1 53:77
.%liverange 0 ~$W1 36:52
.%liverange 0 $R1 78:78
.%var $l0000!txcontrolword0 0 R
.%liverange 0 $W0 55:67
.%liverange 0 ~$W0 68:68
.%liverange 0 $R0 78:78
.%var $l0000!txconfigdata0 0 R
.%liverange 0 $W0 19:25
.%liverange 0 $R0 78:78
.%var l0000!txconfigdata0 0 R
.%liverange 0 B8 17:77
.%var l0000!tbuf_addr 0 R
.%liverange 0 B6 41:77
.%liverange 0 ~B6 36:40
.%var l0000!msfaddress 0 R
.%liverange 0 B5 16:55 57:77
.%liverange 0 A7 56:56
.%var l0000!byte_cnt 0 R
.%liverange 0 B4 40:63
.%liverange 0 A6 64:77
.%liverange 0 ~A6 36:39
.%var l0000!refcnt 0 R
.%liverange 0 A5 44:77
.%liverange 0 ~A5 36:43
.%var l0000!pkt_count_rx 0 R
.%liverange 0 B3 36:77
.%var l0000!pkt_count_tx 0 R
.%liverange 0 A4 4:77
.%var $l0000!scratch_data 0 R
.%liverange 0 $W0 75:77
.%liverange 0 ~$W0 36:54
.%liverange 0 $R0 37:66
.%liverange 0 ~$R0 36:36
.%var l0000!put_ring_num 0 R
.%liverange 0 A3 14:77
.%var l0000!get_ring_num 0 R
.%liverange 0 B2 13:77
.%var l0000!temp 0 R
.%liverange 0 A2 54:77
.%liverange 0 ~A2 36:53
.%var l0001!scratch_sig3 1 R
.%liverange 0 G3 29:30
.%liverange 0 G3 34:35
.%var l0001!scratch_sig2 1 R
.%liverange 0 G2 28:30 33:35
.%var l0001!scratch_sig1 1 R
.%liverange 0 G1 27:30 32:35
.%var l0000!scratch_sig 1 R
.%liverange 0 G1 37:37 70:70 76:76
.%var l0000!msf_sig 1 R
.%liverange 0 G1 20:20 23:23 58:58 67:67 73:73
.%var l0000!dram_sig 1 R
.%liverange 0 D2 51:52
.%scope end
.0 D800800010 common_code
	.import_var __chip_id i$__chip_id __chip_revision i$__chip_revision __uengine_id i$__uengine_id
	.%line 59 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
	.reg l0000!temp l0000!offset $l0000!pci_rw l0000!loops l0000!get_ring_num l0000!put_ring_num $l0000!scratch_data
	.%line 60 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
	.reg l0000!pkt_count_tx l0000!pkt_count_rx l0000!refcnt l0000!byte_cnt
	.%line 61 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
	.reg l0000!msfaddress l0000!msfaddress0 l0000!msfaddress1 l0000!tbuf_addr
	.%line 62 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
	.reg l0000!txconfigdata0
	.%line 63 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
	.reg $l0000!txconfigdata0
	.%line 64 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
	.reg $l0000!txcontrolword0 $l0000!txcontrolword1
	.%line 65 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
	.reg l0000!tbuf_element
	.%line 66 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
	.reg l0000!dram_addr l0000!tbuf l0000!scratch_addr l0000!sram_addr l0000!pci_base
	.%line 67 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
	.reg l0000!payload_len $l0000!temp_xfer
	.%line 68 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
	.sig l0000!dram_sig l0000!msf_sig l0000!pci_sig l0000!sram_sig l0000!scratch_sig
	.%line 70 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
	.xfer_order $l0000!txcontrolword0 $l0000!txcontrolword1
	.%line 72 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0 2
	br=ctx[0, init#]
.1 E000010000 common_code
	.%line 73 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
	ctx_arb[kill], any
.2 F000000300 common_code
	.%line 75 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
	init#:
	.%line 90 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
		immed[l0000!tbuf_element, 0]
.3 F0000C0004 common_code
	.%line 91 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
		immed[l0000!pkt_count_tx, 0]
.4 F000400700 common_code
	.%line 93 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
		immed[l0000!scratch_addr, 0x400]
.5 F000002700 common_code
	.%line 95 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
		immed[l0000!sram_addr, 0]
.6 F440002710 common_code
	.%line 96 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
		immed_w1[l0000!sram_addr, 16]
.7 9A20982621 common_code
	.%line 97 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
		alu_shf[l0000!sram_addr, l0000!sram_addr, or, 1, <<30]
.8 F0000C0000 common_code
	.%line 99 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
		immed[l0000!dram_addr, 0]
.9 F4401C0000 common_code
	.%line 100 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
		immed_w1[l0000!dram_addr, 256]
.10 F000002B00 common_code
	.%line 102 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
		immed[l0000!pci_base, 0]
.11 F440702B00 common_code
	.%line 103 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
		immed_w1[l0000!pci_base, 1792]
.12 91E0208200 common_code
	.%line 105 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
		alu_shf[l0000!get_ring_num, --, b, 0, <<2]
.13 81E0308600 common_code
	.%line 106 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0
		alu_shf[l0000!put_ring_num, --, b, 1, <<2]
.14 F0020C0001 common_code
	.%line 112 "C:\phase9rel\diag\test_suites\microcode\sf_loopback\sf_loopback_tx.uc" 1 0