sys_loopback_bw_3_eg_rx.list

开发Inetl IXP2400平台所必须的硬件诊断和测试程序。该软件包支持的功能包括CPU基本功能检测

+version:  10/31/2000
+switches:  
+uca_version: 3.6.354
+uca_date: Jan 20 2004 14:03:45
+current_date: Tue Mar 02 12:01:26 2004

.cpu_version 0x00000002 1 255

.%num_contexts 8

.%local_mem0_mode rel
.%local_mem1_mode rel

.%init_nn_mode neighbor

.%legacy xfer on

:0xfbfb# 151
:check_ring_full# 148
:init_rbuf# 47
:init_thread0_only# 21
:l000_01# 102
:l000_end# 102
:l001_01# 112
:l001_02# 121
:l001_03# 130
:l001_04# 139
:l001_end# 140
:l002_01# 110
:l002_end# 111
:l003_01# 119
:l003_end# 120
:l004_01# 128
:l004_end# 129
:l005_01# 137
:l005_end# 138
:l006_01# 150
:l006_end# 150
:next_packet# 150
:null# 150
:rec_error# 159
:receivenextpacket# 86
:rsw# 89
:size_error# 155
*-- no_destination 0
*l0000!cur_me gpr_b_rel 01
*l0000!cur_ctx gpr_a_rel 00
*l0000!sram_channel_number gpr_b_rel 0E
*l0000!t0 gpr_b_rel 0F
*@l0000!total_rx gpr_a_abs 01
*@l0000!total_packet gpr_b_abs 20
*@l0000!cur_loop gpr_b_abs 30
*@l0000!total_loop gpr_b_abs 40
*l0000!ring gpr_b_rel 02
;*l0000!rxconfigdata!!2 gpr_a_rel 05
*l0000!rxconfigdata gpr_b_rel 01
*l0000!rbuf_base gpr_a_rel 02
*l0000!rbuf_elem_done gpr_b_rel 03
*l0000!rx_thd_freelist gpr_b_rel 03
*l0000!null gpr_b_rel 04
*l0000!elem gpr_b_rel 04
;*l0000!bytecnt!!2 gpr_b_rel 05
*l0000!bytecnt gpr_b_rel 05
*$l0000!prepend_data0 sram_rel 00 0 both 3 0x4C
*$l0000!prepend_data1 sram_rel 01 0 both 2 0x4C
*$l0000!data_4byte sram_rel 02 0 both 1 0x4C
*$l0000!ring_data sram_rel 00 0 both 1 0x0
*@l0000!sramdescbase gpr_b_abs 00
*@l0000!drampacketbase gpr_b_abs 10
*@l0000!expected_sequence_0 gpr_a_abs 11
*@l0000!expected_sequence_1 gpr_a_abs 21
*@l0000!expected_sequence_2 gpr_a_abs 31
*@l0000!expected_sequence_3 gpr_a_abs 41
*$l0000!transferreg00 sram_rel 03 0 both 2 0x40
*$l0000!transferreg01 sram_rel 04 0 both 1 0x40
*l0001!temp_data gpr_b_rel 02
;*l0002!rxthreadlist!!2 gpr_b_rel 06
;*l0002!rxthreadlist!!3 gpr_b_rel 06
*l0002!rxthreadlist gpr_a_rel 03
*l0002!temp_data gpr_a_rel 04
;*l0002!me_data!!2 gpr_b_rel 06
*l0002!me_data gpr_b_rel 06
*l0003!temp_scratch_addr gpr_b_rel 07
*$l0003!temp_scratch_data sram_rel 00 0 both 1 0x0
*l0003!temp_data gpr_b_rel 08
*l0004!temp_scratch_addr gpr_b_rel 09
*$l0004!temp_scratch_data sram_rel 00 0 both 1 0x0
*l0005!msfaddress gpr_b_rel 0A
*l0005!rxcontroldata gpr_b_rel 0B
*$l0005!rxcontroldata sram_rel 00 0 both 1 0x0
*l0006!msfaddress gpr_b_rel 0C
*$l0006!csixtypemapdata sram_rel 00 0 both 1 0x0
*l0007!temp_reg gpr_b_rel 07
*l0007!rbufelemdonedata gpr_b_rel 08
*l0008!msfaddress gpr_b_rel 0D
*$l0008!rxcontroldata sram_rel 00 0 both 1 0x0
;*l0009!timeout_val!!2 gpr_b_rel 0E
*l0009!timeout_val gpr_b_rel 0E
*l0010!msfaddress gpr_b_rel 09
*l0010!txcontroldata gpr_b_rel 0A
*$l0010!txcontroldata sram_rel 00 0 both 1 0x0
;*l0011!msfaddress!!2 gpr_b_rel 0F
;*l0011!msfaddress!!3 gpr_b_rel 0F
;*l0011!msfaddress!!4 gpr_b_rel 0F
*l0011!msfaddress gpr_b_rel 0F
*l0011!txupcontroldata gpr_b_rel 01
*$l0011!txupcontroldata sram_rel 00 0 both 1 0x0
*l0012!msfaddress gpr_b_rel 04
*$l0012!txcontroldata sram_rel 00 0 both 1 0x0
*$l0013!scratch_base sram_rel 00 0 both 1 0x0
*$l0013!scratch_head sram_rel 01 0 both 1 0x0
*$l0013!scratch_tail sram_rel 02 0 both 1 0x0
*l0013!temp_val gpr_b_rel 05
*l0014!ind_ref_data gpr_b_rel 0B
*l0015!rbufaddress gpr_b_rel 0C
*l0016!temp_sequence gpr_b_rel 0D
*l0017!rbuf_elem_done_data gpr_b_rel 07
*$l0018!temp_scratch sram_rel 00 0 both 1 0x0
*l0018!temp_scratch_addr gpr_b_rel 02
*$l0019!temp_scratch sram_rel 00 0 both 1 0x0
*l0019!temp_scratch_addr gpr_b_rel 03
*$l0020!temp_scratch sram_rel 00 0 both 1 0x0
*l0020!temp_scratch_addr gpr_b_rel 08
*l0013!scratch_sig3 signal 03 0
*l0013!scratch_sig2 signal 02 0
*l0013!scratch_sig1 signal 01 0
*l0004!scratch_sig signal 01 0
*l0003!scratch_sig signal 01 0
*l0000!ring_sig signal 01 0
*l0000!scratch_sig signal 01 0
*l0000!scratch_sig!!3 signal 01 0
*l0000!scratch_sig!!2 signal 01 0
*l0000!msf_sig signal 01 0
*l0000!msf_sig!!12 signal 01 0
*l0000!msf_sig!!11 signal 01 0
*l0000!msf_sig!!10 signal 01 0
*l0000!msf_sig!!9 signal 01 0
*l0000!msf_sig!!8 signal 01 0
*l0000!msf_sig!!7 signal 01 0
*l0000!msf_sig!!6 signal 01 0
*l0000!msf_sig!!5 signal 01 0
*l0000!msf_sig!!4 signal 01 0
*l0000!msf_sig!!3 signal 01 0
*l0000!msf_sig!!2 signal 01 0
*l0000!next_ctx_sig signal 0E 0
*l0000!rx_sig signal 01 0
.%type R
.%type SI
.%scope global
.%var l0020!temp_scratch_addr 0 R
.%liverange 0 B8 161:162
.%var $l0020!temp_scratch 0 R
.%liverange 0 $W0 160:162
.%liverange 0 $R0 163:163
.%var l0019!temp_scratch_addr 0 R
.%liverange 0 B3 157:158
.%var $l0019!temp_scratch 0 R
.%liverange 0 $W0 156:158
.%liverange 0 $R0 163:163
.%var l0018!temp_scratch_addr 0 R
.%liverange 0 B2 153:154
.%var $l0018!temp_scratch 0 R
.%liverange 0 $W0 152:154
.%liverange 0 $R0 163:163
.%var l0017!rbuf_elem_done_data 0 R
.%liverange 0 B7 141:149
.%liverange 0 ~B7 86:140 150:162
.%var l0016!temp_sequence 0 R
.%liverange 0 B13 103:149 151:154 159:162
.%liverange 0 ~B13 86:102 150:150 155:158
.%var l0015!rbufaddress 0 R
.%liverange 0 B12 94:149 151:162
.%liverange 0 ~B12 86:93 150:150
.%var l0014!ind_ref_data 0 R
.%liverange 0 B11 96:149 151:162
.%liverange 0 ~B11 86:95 150:150
.%var l0013!temp_val 0 R
.%liverange 0 B5 79:85
.%liverange 0 ~B5 86:97 150:150
.%var $l0013!scratch_tail 0 R
.%liverange 0 $W2 82:85
.%liverange 0 ~$W2 86:162
.%liverange 0 $R2 163:163
.%var $l0013!scratch_head 0 R
.%liverange 0 $W1 81:85
.%liverange 0 ~$W1 86:162
.%liverange 0 $R1 163:163
.%var $l0013!scratch_base 0 R
.%liverange 0 $W0 80:85
.%liverange 0 ~$W0 86:147 150:151 155:155 159:159
.%liverange 0 $R0 163:163
.%var $l0012!txcontroldata 0 R
.%liverange 0 $W0 77:79
.%liverange 0 $R0 76:85
.%liverange 0 ~$R0 86:94 150:150
.%var l0012!msfaddress 0 R
.%liverange 0 B4 75:85
.%liverange 0 ~B4 86:89
.%var $l0011!txupcontroldata 0 R
.%liverange 0 $W0 66:76
.%liverange 0 $R0 163:163
.%var l0011!txupcontroldata 0 R
.%liverange 0 B1 65:85
.%liverange 0 ~B1 86:162
.%var l0011!msfaddress 0 R
.%liverange 0 B15 67:85
.%liverange 0 ~B15 86:162
.%var $l0010!txcontroldata 0 R
.%liverange 0 $W0 63:65
.%liverange 0 $R0 163:163
.%var l0010!txcontroldata 0 R
.%liverange 0 B10 61:85
.%liverange 0 ~B10 86:162
.%var l0010!msfaddress 0 R
.%liverange 0 B9 60:85
.%liverange 0 ~B9 86:162
.%var l0009!timeout_val 0 R
.%liverange 0 B14 57:85
.%liverange 0 ~B14 86:162
.%var $l0008!rxcontroldata 0 R
.%liverange 0 $W0 55:62
.%liverange 0 $R0 54:75
.%var l0008!msfaddress 0 R
.%liverange 0 B13 53:85
.%liverange 0 ~B13 86:102 150:150 155:158
.%var l0007!rbufelemdonedata 0 R
.%liverange 0 B8 48:85
.%liverange 0 ~B8 47:47 86:160
.%var l0007!temp_reg 0 R
.%liverange 0 B7 47:85
.%liverange 0 ~B7 86:140 150:162
.%var $l0006!csixtypemapdata 0 R
.%liverange 0 $W0 44:54
.%liverange 0 $R0 163:163
.%var l0006!msfaddress 0 R
.%liverange 0 B12 45:85
.%liverange 0 ~B12 86:93 150:150
.%var $l0005!rxcontroldata 0 R
.%liverange 0 $W0 41:43
.%liverange 0 $R0 163:163
.%var l0005!rxcontroldata 0 R
.%liverange 0 B11 39:85
.%liverange 0 ~B11 86:95 150:150
.%var l0005!msfaddress 0 R
.%liverange 0 B10 42:60
.%var $l0004!temp_scratch_data 0 R
.%liverange 0 $W0 163:163
.%liverange 0 $R0 37:53
.%var l0004!temp_scratch_addr 0 R
.%liverange 0 B9 36:59
.%var l0003!temp_data 0 R
.%liverange 0 B8 34:46
.%liverange 0 ~B8 47:47
.%var $l0003!temp_scratch_data 0 R
.%liverange 0 $W0 163:163
.%liverange 0 $R0 33:36
.%var l0003!temp_scratch_addr 0 R
.%liverange 0 B7 32:46
.%var l0002!me_data 0 R
.%liverange 0 B6 11:14
.%var l0002!temp_data 0 R
.%liverange 0 A4 12:162
.%var l0002!rxthreadlist 0 R
.%liverange 0 A3 14:14
.%liverange 0 B6 15:162
.%var l0001!temp_data 0 R
.%liverange 0 B2 2:4
.%var $l0000!transferreg01 0 R
.%liverange 0 $W4 163:163
.%liverange 0 $R4 163:163
.%var $l0000!transferreg00 0 R
.%liverange 0 $W3 0:162
.%liverange 0 $R3 0:162
.%var @l0000!expected_sequence_3 0 R
.%liverange 0 @A65 0:162
.%var @l0000!expected_sequence_2 0 R
.%liverange 0 @A49 0:162
.%var @l0000!expected_sequence_1 0 R
.%liverange 0 @A33 0:162
.%var @l0000!expected_sequence_0 0 R
.%liverange 0 @A17 0:162
.%var @l0000!drampacketbase 0 R