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📄 me_timers_counters_test.list

📁 开发Inetl IXP2400平台所必须的硬件诊断和测试程序。该软件包支持的功能包括CPU基本功能检测
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+version:  10/31/2000
+switches:  
+uca_version: 3.6.354
+uca_date: Jan 20 2004 14:03:45
+current_date: Mon Mar 01 17:17:32 2004

.cpu_version 0x00000002 1 255

.%num_contexts 8

.%local_mem0_mode rel
.%local_mem1_mode rel

.%init_nn_mode neighbor

.%legacy xfer on

:end# 48
:me1_me7# 27
:me_offset_obtain# 12
:timestamp_disabled# 28
:wait_for_timestamp_signal# 42
*-- no_destination 0
*l0000!scratch_base gpr_a_rel 00
*l0000!timer_wr_low gpr_b_rel 01
;*l0000!timer_rd_low!!2 gpr_b_rel 02
*l0000!timer_rd_low gpr_b_rel 02
;*l0000!me_offset!!2 gpr_b_rel 00
*l0000!me_offset gpr_b_rel 00
;*l0000!me!!2 gpr_a_rel 01
*l0000!me gpr_b_rel 03
*$l0000!status0 sram_rel 00 0 both 1 0x0
*l0000!signal_2 signal 02 0
*l0000!signal_1 signal 01 0
*l0000!scratch_write signal 01 0
.%type R
.%type SI
.%scope global
.%var $l0000!status0 0 R
.%liverange 0 $W0 46:47
.%liverange 0 ~$W0 48:53
.%liverange 0 $R0 55:55
.%var l0000!me 0 R
.%liverange 0 B3 7:7
.%liverange 0 A1 8:47
.%liverange 0 ~A1 48:53
.%var l0000!me_offset 0 R
.%liverange 0 B0 9:47
.%liverange 0 ~B0 48:53
.%var l0000!timer_rd_low 0 R
.%liverange 0 B2 4:47
.%liverange 0 ~B2 48:53
.%var l0000!timer_wr_low 0 R
.%liverange 0 B1 5:47
.%liverange 0 ~B1 48:53
.%var l0000!scratch_base 0 R
.%liverange 0 A0 3:47
.%liverange 0 ~A0 48:53
.%var l0000!signal_2 1 R
.%liverange 0 G2 43:43
.%var l0000!signal_1 1 R
.%liverange 0 G1 28:28
.%var l0000!scratch_write 1 R
.%liverange 0 G1 47:48
.%scope end
.0 D80C000011 common_code
	.import_var __chip_id i$__chip_id __chip_revision i$__chip_revision __uengine_id i$__uengine_id
	.%line 51 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0 48
	br!=ctx[0, end#]
.1 E000000001 common_code
	.%line 56 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	.reg l0000!scratch_base l0000!timer_wr_low l0000!timer_rd_low l0000!me_offset l0000!me
	.%line 57 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	.sig l0000!scratch_write l0000!signal_1 l0000!signal_2
	.%line 58 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	.addr l0000!signal_1 0x1
	.%line 59 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	.addr l0000!signal_2 0x2
	.%line 60 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	.reg $l0000!status0
	.%line 62 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	ctx_arb[voluntary]
.2 F0000C0000 common_code
	.%line 64 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	immed[l0000!scratch_base, 0]
.3 F000000B00 common_code
	.%line 65 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	immed[l0000!timer_rd_low, 0]
.4 F000000700 common_code
	.%line 66 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	immed[l0000!timer_wr_low, 0]
.5 FC044C0000 common_code
	.%line 69 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 1
	local_csr_rd[active_ctx_sts]
.6 F000000F00 common_code
	.%line 70 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 0
	immed[l0000!me, 0]
.7 8430100D3F common_code
	.%line 71 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	alu_shf[l0000!me, 0x1f, and, l0000!me, >>3]
.8 B4400C0C01 common_code
	.%line 72 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	alu[l0000!me_offset, 0x3, and, l0000!me]
.9 AAB00C0C01 common_code
	.%line 73 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	alu[--, l0000!me, -, 0x3]
.10 D80300010A common_code
	.%line 74 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0 12
	ble[me_offset_obtain#]
.11 BA40000304 common_code
	.%line 76 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	alu[l0000!me_offset, l0000!me_offset, or, 0x4]
.12 91E0000200 common_code
	.%line 78 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	me_offset_obtain#:
	.%line 79 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	alu_shf[l0000!me_offset, --, b, l0000!me_offset, <<2]
.13 AAB00C0001 common_code
	.%line 81 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	alu[--, l0000!me, -, 0x0]
.14 D806C00101 common_code
	.%line 82 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0 27
	bne[me1_me7#]
.15 3304012B04 common_code
	.%line 83 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
		cap[fast_wr, 0x100, misc_control]
.16 F0000C0300 common_code
	.%line 84 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	.macro_ref 	multi_nop(3)
	.%line 35 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
		nop
.17 F0000C0300 common_code
	.%line 35 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
		nop
.18 F0000C0300 common_code
	.%line 35 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
		nop
.19 330205031C common_code
	.%line 39 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	.end_macro_ref 	multi_nop
	.%line 86 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
		cap[fast_wr, 129, interthread_sig]
.20 330405031C common_code
	.%line 87 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
		cap[fast_wr, 257, interthread_sig]
.21 330605031C common_code
	.%line 88 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
		cap[fast_wr, 385, interthread_sig]
.22 332005031C common_code
	.%line 89 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
		cap[fast_wr, 2049, interthread_sig]
.23 332205031C common_code
	.%line 90 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
		cap[fast_wr, 2177, interthread_sig]
.24 332405031C common_code
	.%line 91 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
		cap[fast_wr, 2305, interthread_sig]
.25 332605031C common_code
	.%line 92 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
		cap[fast_wr, 2433, interthread_sig]
.26 D807000018 common_code
	.%line 93 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0 28
		br[timestamp_disabled#]
.27 E000000002 common_code
	.%line 95 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	me1_me7#:
	.%line 96 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
		ctx_arb[l0000!signal_1]
.28 F04FF007FF common_code
	.%line 98 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	timestamp_disabled#:
	.%line 100 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	immed_w0[l0000!timer_wr_low,0xffff]
.29 F44FF007FF common_code
	.%line 101 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	immed_w1[l0000!timer_wr_low,0xffff]
.30 FC0C200700 common_code
	.%line 102 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	local_csr_wr[timestamp_low, l0000!timer_wr_low]
.31 FC05EC1304 common_code
	.%line 105 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	local_csr_wr[active_ctx_future_count, 0x4]
.32 FC07EC0B02 common_code
	.%line 108 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	local_csr_wr[active_future_count_signal, 0x2]
.33 F0000C0300 common_code
	.%line 109 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	.macro_ref multi_nop(3)
	.%line 35 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	nop
.34 F0000C0300 common_code
	.%line 35 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	nop
.35 F0000C0300 common_code
	.%line 35 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	nop
.36 AAB00C0001 common_code
	.%line 39 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	.end_macro_ref multi_nop
	.%line 111 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	alu[--, l0000!me, -, 0x0]
.37 D80A800101 common_code
	.%line 112 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0 42
	bne[wait_for_timestamp_signal#]
.38 3306012B04 common_code
	.%line 113 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
		cap[fast_wr, 0x180, misc_control]
.39 F0000C0300 common_code
	.%line 114 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	.macro_ref 	multi_nop(3)
	.%line 35 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
		nop
.40 F0000C0300 common_code
	.%line 35 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
		nop
.41 F0000C0300 common_code
	.%line 35 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
		nop
.42 E000000004 common_code
	.%line 39 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	.end_macro_ref 	multi_nop
	.%line 117 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	wait_for_timestamp_signal#:
	.%line 119 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	ctx_arb[l0000!signal_2]
.43 FC0C0C0000 common_code
	.%line 122 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 1
	; Read TIMESTAMP_Low register
	local_csr_rd[timestamp_low]
.44 F000000B00 common_code
	.%line 123 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 0
	immed[l0000!timer_rd_low,0]
.45 A018000800 common_code
	.%line 127 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	alu[$l0000!status0, --, b, l0000!timer_rd_low]
.46 1110000300 common_code
	.%line 129 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	scratch[write, $l0000!status0, l0000!scratch_base, l0000!me_offset, 1], sig_done[l0000!scratch_write]
.47 E000000002 common_code
	.%line 130 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	ctx_arb[l0000!scratch_write]
.48 F0000C0300 common_code
	.%line 132 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	end#:
	.%line 133 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	nop
.49 F0000C0300 common_code
	.%line 134 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	nop
.50 F0000C0300 common_code
	.%line 135 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	nop
.51 F0000C0300 common_code
	.%line 136 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	nop
.52 F0000C0300 common_code
	.%line 137 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	nop
.53 E000010000 common_code
	.%line 138 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	ctx_arb[kill], any
.54 F0000C0300 common_code
	.%line 143 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	; The following uwords are unreachable and have been commented out
	; nop
	; nop
	; nop
	; nop
	; End commenting out unreachable code
	.%line 143 "C:\phase9rel\diag\test_suites\microcode\ME_Timers_Counters_Test\ME_Timers_Counters_Test.uc" 1 0
	nop
+ucode_end



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